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From: Tom Tromey <tom@tromey.com>
To: Andrew Burgess <andrew.burgess@embecosm.com>
Cc: Tom Tromey <tom@tromey.com>,  Nelson Chu <nelson.chu@sifive.com>,
 gdb-patches@sourceware.org
Subject: Re: [0/1] RISC-V: Update CSR to priv 1.11.
References: <1584007257-14466-1-git-send-email-nelson.chu@sifive.com>
 <87r1upefg8.fsf@tromey.com> <20200608213927.GC2737@embecosm.com>
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Date: Tue, 09 Jun 2020 14:12:25 -0600
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Andrew> Unless I misunderstand here, you asking why we don't use the xml
Andrew> target descriptions?  We do.  Or we _should_ do.  Maybe it's not
Andrew> working?  Is your target definitely sending back a description?  And
Andrew> it definitely includes register "dscratch" ?

It's definitely sending back a description, and it definitely includes
dscratch.  I did "set remotefilelog ..."; I've appended the relevant
lines.

Andrew> I'll try to get QEMU built and running tomorrow and see if I can gi=
ve
Andrew> you a better answer, however, the patch below might help.  It adds =
an
Andrew> alias from 'dscratch' to 'dscratch0', so your 'info registers
Andrew> dscratch' should start working again.

Andrew> Let me know if this helps at all.

It doesn't seem to make a difference.

Tom


w +$qXfer:features:read:target.xml:0,ffb#79
r +$l<?xml version=3D"1.0"?><!DOCTYPE target SYSTEM "gdb-target.dtd"><targe=
t><xi:include href=3D"riscv-64bit-cpu.xml"/><xi:include href=3D"riscv-64bit=
-fpu.xml"/><xi:include href=3D"riscv-64bit-csr.xml"/></target>#ca
w +$qXfer:features:read:riscv-64bit-cpu.xml:0,ffb#64
r +$l<?xml version=3D"1.0"?>\n<!-- Copyright (C) 2018-2019 Free Software Fo=
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ut modification,\n     are permitted in any medium without royalty provided=
 the copyright\n     notice and this notice are preserved.  -->\n\n<!-- Reg=
ister numbers are hard-coded in order to maintain backward\n     compatibil=
ity with older versions of tools that didn't use xml\n     register descrip=
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"org.gnu.gdb.riscv.cpu">\n  <reg name=3D"zero" bitsize=3D"64" type=3D"int" =
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/feature>\n#3d
w +$qXfer:features:read:riscv-64bit-fpu.xml:0,ffb#67
r +$m<?xml version=3D"1.0"?>\n<!-- Copyright (C) 2018-2019 Free Software Fo=
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ut modification,\n     are permitted in any medium without royalty provided=
 the copyright\n     notice and this notice are preserved.  -->\n\n<!-- Reg=
ister numbers are hard-coded in order to maintain backward\n     compatibil=
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tions.  -->\n\n<!DOCTYPE feature SYSTEM "gdb-target.dtd">\n<feature name=3D=
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ype=3D"riscv_doub#ad
w +$qXfer:features:read:riscv-64bit-fpu.xml:7fd,ffb#38
r +$lle"/>\n  <reg name=3D"fs10" bitsize=3D"64" type=3D"riscv_double"/>\n  =
<reg name=3D"fs11" bitsize=3D"64" type=3D"riscv_double"/>\n  <reg name=3D"f=
t8" bitsize=3D"64" type=3D"riscv_double"/>\n  <reg name=3D"ft9" bitsize=3D"=
64" type=3D"riscv_double"/>\n  <reg name=3D"ft10" bitsize=3D"64" type=3D"ri=
scv_double"/>\n  <reg name=3D"ft11" bitsize=3D"64" type=3D"riscv_double"/>\=
n\n  <reg name=3D"fflags" bitsize=3D"32" type=3D"int" regnum=3D"66"/>\n  <r=
eg name=3D"frm" bitsize=3D"32" type=3D"int" regnum=3D"67"/>\n  <reg name=3D=
"fcsr" bitsize=3D"32" type=3D"int" regnum=3D"68"/>\n</feature>\n#55
w +$qXfer:features:read:riscv-64bit-csr.xml:0,ffb#64
r +$m<?xml version=3D"1.0"?>\n<!-- Copyright (C) 2018-2019 Free Software Fo=
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ut modification,\n     are permitted in any medium without royalty provided=
 the copyright\n     notice and this notice are preserved.  -->\n\n<!DOCTYP=
E feature SYSTEM "gdb-target.dtd">\n<feature name=3D"org.gnu.gdb.riscv.csr"=
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 <reg name=3D"hpmcounter15" bitsize=3D"64"/>\n  <reg name=3D"hpmcounter16" =
bitsize=3D"64"/>\n  <reg name=3D"hpmcounter17" bitsize=3D"64"/>\n  <reg nam=
e=3D"hpmcounter18" bitsize=3D"64"/>\n  <reg name=3D"hpmcounter19" bitsize=
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\n  <reg name=3D"hpmcounter23" bitsize=3D"64"/>\n  <reg name=3D"hpmcounter2=
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>\n  <reg name=3D"hpmcounter31"#12
w +$qXfer:features:read:riscv-64bit-csr.xml:7fd,ffb#35
r +$m bitsize=3D"64"/>\n  <reg name=3D"cycleh" bitsize=3D"64"/>\n  <reg nam=
e=3D"timeh" bitsize=3D"64"/>\n  <reg name=3D"instreth" bitsize=3D"64"/>\n  =
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w +$qXfer:features:read:riscv-64bit-csr.xml:ffa,ffb#61
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=3D"64"/>\n  <reg name=3D"pmpaddr5" bitsize=3D"64"/>\n  <reg name=3D"pmpadd=
r6" bitsize=3D"64"/>\n  <reg name=3D"pmpaddr7" bitsize=3D"64"/>\n  <reg nam=
e=3D"pmpaddr8" bitsize=3D"64"/>\n  <reg name=3D"pmpaddr9" bitsize=3D"64"/>\=
n  <reg name=3D"pmpaddr10" bitsize=3D"64"/>\n  <reg name=3D"pmpaddr11" bits=
ize=3D"64"/>\n  <reg name=3D"pmpaddr12" bitsize=3D"64"/>\n  <reg name=3D"pm=
paddr13" bitsize=3D"64"/>\n  <reg name=3D"pmpaddr14" bitsize=3D"64"/>\n  <r=
eg name=3D"pmpaddr15" bitsize=3D"64"/>\n  <reg name=3D"mcycle" bitsize=3D"6=
4"/>\n  <reg name=3D"minstret" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter=
3" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter4" bitsize=3D"64"/>\n  <reg =
name=3D"mhpmcounter5" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter6" bitsiz=
e=3D"64"/>\n  <reg name=3D"mhpmcounter7" bitsize=3D"64"/>\n  <reg name=3D"m=
hpmcounter8" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter9" bitsize=3D"64"/=
>\n  <reg name=3D"mhpmcounter10" bitsize=3D"64"/>\n  <reg name=3D"mhpmcount=
er11" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter12" bitsize=3D"64"/>\n  <=
reg name=3D"mhpmcounter13" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter14" =
bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter15" bitsize=3D"64"/>\n  <reg na=
me=3D"mhpmcounter16" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter17" bitsiz=
e=3D"64"/>\n  <reg name=3D"mhpmcounter18" bitsize=3D"64"/>\n  <reg name=3D"=
mhpmcounter19" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter20" bitsize=3D"6=
4"/>\n  <reg name=3D"mhpmcounter21" bitsize=3D"64"/>\n  <reg name=3D"mhpmco=
unter22" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter23" b#51
w +$qXfer:features:read:riscv-64bit-csr.xml:17f7,ffb#39
r +$mitsize=3D"64"/>\n  <reg name=3D"mhpmcounter24" bitsize=3D"64"/>\n  <re=
g name=3D"mhpmcounter25" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter26" bi=
tsize=3D"64"/>\n  <reg name=3D"mhpmcounter27" bitsize=3D"64"/>\n  <reg name=
=3D"mhpmcounter28" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter29" bitsize=
=3D"64"/>\n  <reg name=3D"mhpmcounter30" bitsize=3D"64"/>\n  <reg name=3D"m=
hpmcounter31" bitsize=3D"64"/>\n  <reg name=3D"mcycleh" bitsize=3D"64"/>\n =
 <reg name=3D"minstreth" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter3h" bi=
tsize=3D"64"/>\n  <reg name=3D"mhpmcounter4h" bitsize=3D"64"/>\n  <reg name=
=3D"mhpmcounter5h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter6h" bitsize=
=3D"64"/>\n  <reg name=3D"mhpmcounter7h" bitsize=3D"64"/>\n  <reg name=3D"m=
hpmcounter8h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter9h" bitsize=3D"64=
"/>\n  <reg name=3D"mhpmcounter10h" bitsize=3D"64"/>\n  <reg name=3D"mhpmco=
unter11h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter12h" bitsize=3D"64"/>=
\n  <reg name=3D"mhpmcounter13h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcount=
er14h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter15h" bitsize=3D"64"/>\n =
 <reg name=3D"mhpmcounter16h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter1=
7h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter18h" bitsize=3D"64"/>\n  <r=
eg name=3D"mhpmcounter19h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter20h"=
 bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter21h" bitsize=3D"64"/>\n  <reg =
name=3D"mhpmcounter22h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter23h" bi=
tsize=3D"64"/>\n  <reg name=3D"mhpmcounter24h" bitsize=3D"64"/>\n  <reg nam=
e=3D"mhpmcounter25h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter26h" bitsi=
ze=3D"64"/>\n  <reg name=3D"mhpmcounter27h" bitsize=3D"64"/>\n  <reg name=
=3D"mhpmcounter28h" bitsize=3D"64"/>\n  <reg name=3D"mhpmcounter29h" bitsiz=
e=3D"64"/>\n  <reg name=3D"mhpmcounter30h" bitsize=3D"64"/>\n  <reg name=3D=
"mhpmcounter31h" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent3" bitsize=3D"64=
"/>\n  <reg name=3D"mhpmevent4" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent5=
" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent6" bitsize=3D"64"/>\n  <reg nam=
e=3D"mhpmevent7" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent8" bitsize=3D"64=
"/>\n  <reg name=3D"mhpmevent9" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent1=
0" bitsize=3D"64"/>\n  <reg name=3D"mhpmeven#dc
w +$qXfer:features:read:riscv-64bit-csr.xml:1ff4,ffb#65
r +$lt11" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent12" bitsize=3D"64"/>\n =
 <reg name=3D"mhpmevent13" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent14" bi=
tsize=3D"64"/>\n  <reg name=3D"mhpmevent15" bitsize=3D"64"/>\n  <reg name=
=3D"mhpmevent16" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent17" bitsize=3D"6=
4"/>\n  <reg name=3D"mhpmevent18" bitsize=3D"64"/>\n  <reg name=3D"mhpmeven=
t19" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent20" bitsize=3D"64"/>\n  <reg=
 name=3D"mhpmevent21" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent22" bitsize=
=3D"64"/>\n  <reg name=3D"mhpmevent23" bitsize=3D"64"/>\n  <reg name=3D"mhp=
mevent24" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent25" bitsize=3D"64"/>\n =
 <reg name=3D"mhpmevent26" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent27" bi=
tsize=3D"64"/>\n  <reg name=3D"mhpmevent28" bitsize=3D"64"/>\n  <reg name=
=3D"mhpmevent29" bitsize=3D"64"/>\n  <reg name=3D"mhpmevent30" bitsize=3D"6=
4"/>\n  <reg name=3D"mhpmevent31" bitsize=3D"64"/>\n  <reg name=3D"tselect"=
 bitsize=3D"64"/>\n  <reg name=3D"tdata1" bitsize=3D"64"/>\n  <reg name=3D"=
tdata2" bitsize=3D"64"/>\n  <reg name=3D"tdata3" bitsize=3D"64"/>\n  <reg n=
ame=3D"dcsr" bitsize=3D"64"/>\n  <reg name=3D"dpc" bitsize=3D"64"/>\n  <reg=
 name=3D"dscratch" bitsize=3D"64"/>\n  <reg name=3D"hstatus" bitsize=3D"64"=
/>\n  <reg name=3D"hedeleg" bitsize=3D"64"/>\n  <reg name=3D"hideleg" bitsi=
ze=3D"64"/>\n  <reg name=3D"hie" bitsize=3D"64"/>\n  <reg name=3D"htvec" bi=
tsize=3D"64"/>\n  <reg name=3D"hscratch" bitsize=3D"64"/>\n  <reg name=3D"h=
epc" bitsize=3D"64"/>\n  <reg name=3D"hcause" bitsize=3D"64"/>\n  <reg name=
=3D"hbadaddr" bitsize=3D"64"/>\n  <reg name=3D"hip" bitsize=3D"64"/>\n  <re=
g name=3D"mbase" bitsize=3D"64"/>\n  <reg name=3D"mbound" bitsize=3D"64"/>\=
n  <reg name=3D"mibase" bitsize=3D"64"/>\n  <reg name=3D"mibound" bitsize=
=3D"64"/>\n  <reg name=3D"mdbase" bitsize=3D"64"/>\n  <reg name=3D"mdbound"=
 bitsize=3D"64"/>\n  <reg name=3D"mucounteren" bitsize=3D"64"/>\n  <reg nam=
e=3D"mscounteren" bitsize=3D"64"/>\n  <reg name=3D"mhcounteren" bitsize=3D"=
64"/>\n</feature>\n#9f
w +$qTStatus#49