From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26257 invoked by alias); 19 Dec 2014 03:55:03 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 26246 invoked by uid 89); 19 Dec 2014 03:55:02 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 19 Dec 2014 03:55:00 +0000 Received: from svr-orw-fem-04.mgc.mentorg.com ([147.34.97.41]) by relay1.mentorg.com with esmtp id 1Y1oeX-0001o0-Aa from Yao_Qi@mentor.com ; Thu, 18 Dec 2014 19:54:57 -0800 Received: from GreenOnly (147.34.91.1) by svr-orw-fem-04.mgc.mentorg.com (147.34.97.41) with Microsoft SMTP Server id 14.3.181.6; Thu, 18 Dec 2014 19:54:56 -0800 From: Yao Qi To: Pedro Alves CC: Subject: Re: [PATCH] MIPS: Handle the DSP registers for bare metal References: <1418909149-29929-1-git-send-email-yao@codesourcery.com> <54930ED2.1080806@redhat.com> Date: Fri, 19 Dec 2014 03:55:00 -0000 In-Reply-To: <54930ED2.1080806@redhat.com> (Pedro Alves's message of "Thu, 18 Dec 2014 17:28:50 +0000") Message-ID: <87r3vwqooq.fsf@codesourcery.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2014-12/txt/msg00563.txt.bz2 Pedro Alves writes: > Took me a bit to grok this, but this is adding slack for ACXn, right? Sorry, what do you mean by "slack" here? Is it "gap" or something else? The offsets of DSP registers are different on linux and bare metal, so this patch gives the correct offset or layout to them. > But it seems like nothing in GDB knows about those ACX registers. I > guess I'm being dense, but why is this patch needed then? They should st= ill > be accessible to the user even without this change, right? Assuming the > description is including them. We want the number of these registers are fixed, and these fixed numbers will be used in a follow-up patch about dynamic registers discovery (which is about reading available config registers and parsing bits in them) MIPS architecture defines 50+ subset of optional CP0 registers, so the number of variants is too high to make current static register description approach useless. --=20 Yao (=E9=BD=90=E5=B0=A7)