From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 123783 invoked by alias); 16 Aug 2018 23:47:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 123770 invoked by uid 89); 16 Aug 2018 23:47:26 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 spammy=gprs, checkpointed, GPRs, pretend X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 16 Aug 2018 23:47:25 +0000 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w7GNceq6082034 for ; Thu, 16 Aug 2018 19:47:23 -0400 Received: from e31.co.us.ibm.com (e31.co.us.ibm.com [32.97.110.149]) by mx0a-001b2d01.pphosted.com with ESMTP id 2kwh7nkhbd-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 16 Aug 2018 19:47:23 -0400 Received: from localhost by e31.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 16 Aug 2018 17:47:21 -0600 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w7GNlKBA4063706 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 16 Aug 2018 16:47:20 -0700 Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0C429BE053; Thu, 16 Aug 2018 17:47:20 -0600 (MDT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B87AEBE051; Thu, 16 Aug 2018 17:47:19 -0600 (MDT) Received: from pedro.localdomain (unknown [9.80.231.116]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 16 Aug 2018 17:47:19 -0600 (MDT) Received: by pedro.localdomain (Postfix, from userid 1000) id 72F573C0452; Thu, 16 Aug 2018 20:47:16 -0300 (-03) From: Pedro Franco de Carvalho To: Pedro Alves , gdb-patches@sourceware.org Cc: uweigand@de.ibm.com, edjunior@gmail.com Subject: Re: [PATCH v4 12/12] [PowerPC] Add support for HTM registers In-Reply-To: <87d0uixe1b.fsf@linux.vnet.ibm.com> References: <20180815000608.26840-1-pedromfc@linux.ibm.com> <20180815000608.26840-13-pedromfc@linux.ibm.com> <540dad8e-f9a2-8173-a556-c919fbeeb43f@redhat.com> <87lg96xktg.fsf@linux.vnet.ibm.com> <87d0uixe1b.fsf@linux.vnet.ibm.com> Date: Thu, 16 Aug 2018 23:47:00 -0000 MIME-Version: 1.0 Content-Type: text/plain x-cbid: 18081623-8235-0000-0000-00000DEBAE92 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009557; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000266; SDB=6.01074561; UDB=6.00553769; IPR=6.00854518; MB=3.00022764; MTD=3.00000008; XFM=3.00000015; UTC=2018-08-16 23:47:22 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18081623-8236-0000-0000-0000424D1BDE Message-Id: <87mutlj2m3.fsf@linux.vnet.ibm.com> X-IsSubscribed: yes X-SW-Source: 2018-08/txt/msg00419.txt.bz2 Pedro Franco de Carvalho writes: > Pedro Franco de Carvalho writes: > >> Pedro Alves writes: >> >>> I won't pretend to understand the above fully (not an Power expert), >>> but the question I ended up with was, after all this, will the >>> GDB-generated files end up looking like kernel-generated cores? >>> Or are there plans for that? >> >> They will end up looking different for this regset note section. This >> really seems like a kernel bug, which I'm hoping will get fixed. > > Correction: the size of the regset note section for 32-bit threads seems > like a kernel bug. The fact that the kernel includes values for > registers that GDB doesn't include in the note section (by zeroing them) > isn't a kernel bug, but to do this GDB would have to be aware of all > these registers that aren't defined in the architecture. > > -- > Pedro Franco de Carvalho Does this issue block the patches? I could add the registers to GDB but it would be messy, since it would require a linux-specific target description with these extra registers. Alternatively, I can make GDB not generate this specific note section, this is a simple change in the current patches. The only confusing thing is that when reading back the core file through GDB the checkpointed GPRs will show up as unavailable, even if the thread was in the middle of a transaction when the core file was generated, while all the other checkpointed registers will be available. Thanks!! -- Pedro Franco de Carvalho