From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22613 invoked by alias); 26 Feb 2004 09:17:30 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 22601 invoked from network); 26 Feb 2004 09:17:27 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 26 Feb 2004 09:17:27 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.11.6/8.11.6) with ESMTP id i1Q9HQb17868; Thu, 26 Feb 2004 04:17:26 -0500 Received: from localhost (vpnuser4.surrey.redhat.com [172.16.9.4]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i1Q9HP816844; Thu, 26 Feb 2004 04:17:25 -0500 Received: from rsandifo by localhost with local (Exim 3.35 #1) id 1AwHeR-0002Cr-00; Thu, 26 Feb 2004 09:17:51 +0000 To: binutils@sources.redhat.com, gdb-patches@sources.redhat.com Cc: brolley@redhat.com Subject: Various minor FR-V fixes From: Richard Sandiford Date: Thu, 26 Feb 2004 09:17:00 -0000 Message-ID: <87k72ab3nk.fsf@redhat.com> User-Agent: Gnus/5.1006 (Gnus v5.10.6) Emacs/21.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2004-02/txt/msg00756.txt.bz2 This patch fixes a rag-bag of assorted FR-V problems in preperation for the upcoming FR450 patch. It's probably easiest if I just annotate the ChangeLog.... ---------------------------------------------------------------------- * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. ---------------------------------------------------------------------- The fr400 doesn't implement these instructions. ---------------------------------------------------------------------- (scutss): Change unit to I0. ---------------------------------------------------------------------- scutss can only issue to I0, not I1. ---------------------------------------------------------------------- (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. ---------------------------------------------------------------------- These are just jmpl, jmpil and cjmpl instructions in which the LI bit is set. They are indeed implemented on the FR550. ---------------------------------------------------------------------- (mqsaths): Fix FR400-MAJOR categorization. ---------------------------------------------------------------------- It's an M-2 instruction, not an M-1 instruction. ---------------------------------------------------------------------- (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. ---------------------------------------------------------------------- Not a behavioural change, but it's more consistent with the other quad multiplication instructions. ---------------------------------------------------------------------- * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. ---------------------------------------------------------------------- We currently accept invalid packets like: mqmulhs.p fr0,fr2,acc0 mand fr4,fr5,fr6 ---------------------------------------------------------------------- * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. ---------------------------------------------------------------------- Not a bug fix as such, but the fr400 simulator is now effectively an fr405 simulator. It seems more consistent to use the fr405 cache attributes by default. ---------------------------------------------------------------------- (non_cache_access): Add missing breaks. ---------------------------------------------------------------------- Self-explanatory. ---------------------------------------------------------------------- * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. ---------------------------------------------------------------------- This is currently not done for the fr400, but the LSI spec says it should be. ---------------------------------------------------------------------- * memory.c (fr400_check_write_address): Remove redundant alignment check. ---------------------------------------------------------------------- Minor clean-up. The check is already performed by fr400_check_readwrite_address. Tested against the binutils and sim testsuites. OK to install? Richard cpu/ * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. (scutss): Change unit to I0. (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. (mqsaths): Fix FR400-MAJOR categorization. (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. opcodes/ * frv-desc.c, frv-opc.c: Regenerate. sim/frv/ * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. (non_cache_access): Add missing breaks. * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. * memory.c (fr400_check_write_address): Remove redundant alignment check. --- ../src.3/cpu/frv.cpu Wed Feb 25 12:14:03 2004 +++ cpu/frv.cpu Wed Feb 25 13:24:42 2004 @@ -3032,8 +3032,7 @@ (dni nsdiv (c-call VOID "@cpu@_signed_integer_divide" GRi GRj (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (dni udiv @@ -3059,8 +3058,7 @@ (dni nudiv (c-call VOID "@cpu@_unsigned_integer_divide" GRi GRj (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) ; Multiplication @@ -3158,7 +3156,7 @@ (dni slass (dni scutss "Integer accumulator cut with saturation" - ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400)) + ((UNIT I0) (FR400-MAJOR I-1) (MACH fr400)) "scutss$pack $GRj,$GRk" (+ pack GRk OP_46 (rs-null) OPE1_04 GRj) (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj)) @@ -3562,8 +3560,7 @@ (dni nsdivi (c-call VOID "@cpu@_signed_integer_divide" GRi s12 (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (dni udivi @@ -3589,8 +3586,7 @@ (dni nudivi (c-call VOID "@cpu@_unsigned_integer_divide" GRi s12 (index-of GRk) 1) (clobber GRk)) - ((fr400 (unit u-idiv)) - (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) + ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) ) (define-pmacro (multiply-r-simm name signop op comment) @@ -5537,12 +5533,12 @@ (dni jmpl (dni calll "call and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5)) "calll$pack @($GRi,$GRj)" (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj) (jump-and-link-semantics GRi GRj LI) ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni jmpil @@ -5557,12 +5553,12 @@ (dni jmpil (dni callil "call immediate and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5)) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5)) "callil$pack @($GRi,$s12)" (+ pack (misc-null-1) (LI-on) OP_0D GRi s12) (jump-and-link-semantics GRi s12 LI) ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (dni call @@ -6084,7 +6080,8 @@ (conditional-check-float-condition-code (dni cjmpl "conditional jump and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5) CONDITIONAL) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) CONDITIONAL) "cjmpl$pack @($GRi,$GRj),$CCi,$cond" (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) @@ -6095,13 +6092,14 @@ (dni cjmpl (dni ccalll "conditional call and link" - ((UNIT I0) (FR500-MAJOR I-5) (FR400-MAJOR I-5) CONDITIONAL) + ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) + (FR400-MAJOR I-5) CONDITIONAL) "ccalll$pack @($GRi,$GRj),$CCi,$cond" (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj) (if (eq CCi (or cond 2)) (jump-and-link-semantics GRi GRj LI)) ((fr400 (unit u-branch)) - (fr500 (unit u-branch))) + (fr500 (unit u-branch)) (fr550 (unit u-branch))) ) (define-pmacro (cache-invalidate name cache all op ope profile comment) @@ -7379,7 +7377,7 @@ (dni msaths (dni mqsaths "Media quad saturation signed" - ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-1)) + ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-2)) "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven" (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven) (if (orif (register-unaligned FRintieven 2) @@ -8060,7 +8058,7 @@ (define-pmacro (media-quad-multiply-cros name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res @@ -8110,7 +8108,7 @@ (define-pmacro (media-quad-cross-multipl name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res @@ -8160,7 +8158,7 @@ (define-pmacro (media-quad-cross-multipl name mode conv addop rhw res max min op ope comment) (dni name (comment) - ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) + ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2)) (.str name "$pack $FRintieven,$FRintjeven,$" res) (+ pack res op FRintieven ope FRintjeven) (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res --- ../src.3/cpu/frv.opc Wed Feb 25 12:11:58 2004 +++ cpu/frv.opc Wed Feb 25 13:18:32 2004 @@ -499,6 +499,8 @@ fr400_check_insn_major_constraints ( case FR400_MAJOR_M_2: return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1) && ! find_major_in_vliw (vliw, FR400_MAJOR_M_2); + case FR400_MAJOR_M_1: + return !find_major_in_vliw (vliw, FR400_MAJOR_M_2); default: break; } --- ../src.3/sim/frv/cache.c Wed Feb 25 12:12:01 2004 +++ sim/frv/cache.c Wed Feb 25 13:21:13 2004 @@ -39,7 +39,7 @@ frv_cache_init (SIM_CPU *cpu, FRV_CACHE { case bfd_mach_fr400: if (cache->configured_sets == 0) - cache->configured_sets = 128; + cache->configured_sets = 512; if (cache->configured_ways == 0) cache->configured_ways = 2; if (cache->line_size == 0) @@ -208,6 +208,7 @@ non_cache_access (FRV_CACHE *cache, USI if (address >= 0xff000000 || address >= 0xfe000000 && address <= 0xfeffffff) return 1; /* non-cache access */ + break; case bfd_mach_fr550: if (address >= 0xff000000 || address >= 0xfeff0000 && address <= 0xfeffffff) @@ -219,6 +220,7 @@ non_cache_access (FRV_CACHE *cache, USI } else if (address >= 0xfe400000 && address <= 0xfe407fff) return 1; /* non-cache access */ + break; default: if (address >= 0xff000000 || address >= 0xfeff0000 && address <= 0xfeffffff) @@ -230,6 +232,7 @@ non_cache_access (FRV_CACHE *cache, USI } else if (address >= 0xfe400000 && address <= 0xfe403fff) return 1; /* non-cache access */ + break; } hsr0 = GET_HSR0 (); --- ../src.3/sim/frv/interrupts.c Wed Feb 25 12:12:02 2004 +++ sim/frv/interrupts.c Wed Feb 25 13:19:55 2004 @@ -845,8 +845,7 @@ set_exception_status_registers ( break; case FRV_DATA_ACCESS_ERROR: reg_index = 15; /* Use ESR15, EPCR15. */ - if (STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr400) - set_ear = 1; + set_ear = 1; break; case FRV_DATA_ACCESS_EXCEPTION: set_daec = 1; --- ../src.3/sim/frv/memory.c Wed Feb 25 12:12:02 2004 +++ sim/frv/memory.c Wed Feb 25 13:20:39 2004 @@ -679,18 +679,6 @@ frvbf_read_imem_USI (SIM_CPU *current_cp static SI fr400_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask) { - if (address & align_mask) - { - /* On the fr400, this causes a data_access_error. */ - /* Make sure that this exception is not masked. */ - USI isr = GET_ISR (); - if (! GET_ISR_EMAM (isr)) - { - /* Bad alignment causes a data_access_error on fr400. */ - frv_queue_data_access_error_interrupt (current_cpu, address); - } - address &= ~align_mask; - } if (align_mask == 7 && address >= 0xfe800000 && address <= 0xfeffffff) frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);