From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26444 invoked by alias); 22 Oct 2007 20:03:35 -0000 Received: (qmail 26433 invoked by uid 22791); 22 Oct 2007 20:03:33 -0000 X-Spam-Check-By: sourceware.org Received: from smtp.nildram.co.uk (HELO smtp.nildram.co.uk) (195.149.33.74) by sourceware.org (qpsmtpd/0.31) with ESMTP; Mon, 22 Oct 2007 20:03:28 +0000 Received: from firetop.home (85-211-25-104.dyn.gotadsl.co.uk [85.211.25.104]) by smtp.nildram.co.uk (Postfix) with ESMTP id 458FB4D472; Mon, 22 Oct 2007 21:03:23 +0100 (BST) Received: from richard by firetop.home with local (Exim 4.63) (envelope-from ) id 1Ik3Uk-0005VJ-3K; Mon, 22 Oct 2007 21:03:26 +0100 From: Richard Sandiford To: Thiemo Seufer Mail-Followup-To: Thiemo Seufer ,gdb-patches@sourceware.org, rsandifo@nildram.co.uk Cc: gdb-patches@sourceware.org Subject: Re: MIPS32R2 simulator fixes References: <87sl43v2ls.fsf@firetop.home> <20071022120918.GB25397@networkno.de> Date: Mon, 22 Oct 2007 20:22:00 -0000 In-Reply-To: <20071022120918.GB25397@networkno.de> (Thiemo Seufer's message of "Mon\, 22 Oct 2007 13\:09\:18 +0100") Message-ID: <87ir4yudbl.fsf@firetop.home> User-Agent: Gnus/5.110006 (No Gnus v0.6) Emacs/21.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2007-10/txt/msg00519.txt.bz2 Thiemo Seufer writes: > Richard Sandiford wrote: >> - The MIPS32R2 version of check_fmt_p checks UX and PX, but those >> flags are always read as 0 on MIPS32R2 targets. There isn't >> AFAIK any way of turning off paired-single instructions when >> using a MIPS32R2 target that has a 64-bit FPU. > > It is correct that there's no separate switch to disable paired single > when the MIPS-3D ASE is implemented. There is, however, the 3D bit in > FCR0 which announces the availablity of paired single instructions, > it should be set for the MIPS32R2/MIPS64* emulations. OK. >> sim/mips/ >> * mips.igen (check_fmt_p): Provide a separate mips32r2 definition >> that unconditionally allows fmt_ps. >> (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU) >> (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt) >> (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change >> filter from 64,f to 32,f. >> (PREFX): Change filter from 64 to 32. >> (LDXC1, LUXC1): Provide separate mips32r2 implementations >> that use do_load_double instead of do_load. Make both LUXC1 >> versions unpredictable if SizeFGR () != 64. >> (SDXC1, SUXC1): Extend to mips32r2, using do_store_double >> instead of do_store. Remove unused variable. Make both SUXC1 >> versions unpredictable if SizeFGR () != 64. > > Looks good. Applied, thanks. Richard