From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 712 invoked by alias); 6 May 2015 18:16:48 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 694 invoked by uid 89); 6 May 2015 18:16:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e06smtp10.uk.ibm.com Received: from e06smtp10.uk.ibm.com (HELO e06smtp10.uk.ibm.com) (195.75.94.106) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Wed, 06 May 2015 18:16:47 +0000 Received: from /spool/local by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 6 May 2015 19:16:43 +0100 Received: from d06dlp02.portsmouth.uk.ibm.com (9.149.20.14) by e06smtp10.uk.ibm.com (192.168.101.140) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 6 May 2015 19:16:40 +0100 Received: from b06cxnps4074.portsmouth.uk.ibm.com (d06relay11.portsmouth.uk.ibm.com [9.149.109.196]) by d06dlp02.portsmouth.uk.ibm.com (Postfix) with ESMTP id B850D219005C for ; Wed, 6 May 2015 19:16:21 +0100 (BST) Received: from d06av10.portsmouth.uk.ibm.com (d06av10.portsmouth.uk.ibm.com [9.149.37.251]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t46IGdYb2621940 for ; Wed, 6 May 2015 18:16:39 GMT Received: from d06av10.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t46IGdnM023363 for ; Wed, 6 May 2015 12:16:39 -0600 Received: from br87z6lw.de.ibm.com (dyn-9-152-212-115.boeblingen.de.ibm.com [9.152.212.115]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t46IGcpx023351 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA256 bits=256 verify=NO); Wed, 6 May 2015 12:16:39 -0600 From: Andreas Arnez To: Sergio Durigan Junior Cc: gdb-patches@sourceware.org, Ulrich Weigand Subject: Re: Regression on gdb.base/checkpoint.exp on S/390 References: <87fvwu5937.fsf@br87z6lw.de.ibm.com> <87txlavxmd.fsf@br87z6lw.de.ibm.com> <87mw1ig7h3.fsf_-_@redhat.com> Date: Wed, 06 May 2015 18:16:00 -0000 In-Reply-To: <87mw1ig7h3.fsf_-_@redhat.com> (Sergio Durigan Junior's message of "Tue, 05 May 2015 15:16:56 -0400") Message-ID: <87ioc5efll.fsf@br87z6lw.de.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15050618-0041-0000-0000-000004282C89 X-IsSubscribed: yes X-SW-Source: 2015-05/txt/msg00121.txt.bz2 On Tue, May 05 2015, Sergio Durigan Junior wrote: > On Friday, June 07 2013, Andreas Arnez wrote: > >> S/390 regmap rework: Represent register maps in a less redundant and >> more readable way. Also remove some code repetition. > > Hey Andreas, > > As we discussed on private, this commit has caused the following > regression on S/390 (31-bit): > > $ make check RUNTESTFLAGS='--target_board=unix/-m31 gdb.base/checkpoint.exp' > Running ../../../gdb/gdb/testsuite/gdb.base/checkpoint.exp ... > FAIL: gdb.base/checkpoint.exp: restart 1 one > FAIL: gdb.base/checkpoint.exp: verify i 1 one > [...] Right. This is caused by a misunderstanding on my side when I wrote that patch. In fill_gregset, I was under the assumption that the "gregset" part of the REGCACHE is fully populated, since that's what supply_gregset would do. However, fill_gregset is also used within s390_linux_store_inferior_registers, for merging the inferior's registers with one (or all) of a regcache's registers. And that is invoked via regcache_raw_write in a loop for each register when doing regcache_cpy. Until the loop has finished, the destination regcache is partially filled, and my assumption is broken. I've tried a fix that avoids this assumption, and it works. (I'll post it soon.) But I also wonder whether it's intended that each regcache_raw_write results in two ptrace calls? This seems quite inefficient, considering that all inferior's registers could be modified at once.