From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id Y7f+LI1oP2qIJhoAWB0awg (envelope-from ) for ; Sat, 27 Jun 2026 02:07:09 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mzijespc; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id A81571E070; Sat, 27 Jun 2026 02:07:09 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-5.4 required=5.0 tests=ARC_SIGNED,ARC_VALID,BAYES_00, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H2 autolearn=ham autolearn_force=no version=4.0.1 Received: from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 7348D1E070 for ; Sat, 27 Jun 2026 02:07:07 -0400 (EDT) Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A86A04BA23C2 for ; Sat, 27 Jun 2026 06:07:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A86A04BA23C2 Authentication-Results: sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mzijespc Received: from mail-dy1-x132b.google.com (mail-dy1-x132b.google.com [IPv6:2607:f8b0:4864:20::132b]) by sourceware.org (Postfix) with ESMTPS id F08654BA2E13 for ; Sat, 27 Jun 2026 06:06:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F08654BA2E13 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org F08654BA2E13 Authentication-Results: sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::132b ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1782540400; cv=none; b=ahWN29pw7SDzeUw+F9YB6MfpwKGMdO4KF8u4U89jjrmqFXwkImafZMXtzZU9ywTW+QpoFAtw4GlAbiua53tpD6kkik6MoJh8ShRXAZkltK7wT9WmasH5o9LNxGEKD2qHpSOsSb3aozxsJhF0st9TxzAlR7TIvqaSFyWbWRBgHfE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1782540400; c=relaxed/simple; bh=M8W81PW75tkjDiBtDILVRVa3y7sGJ/yJc4oMm3Xe1Io=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Wa28LvzXU/Z+SODEqy1NhTOjcIdyXzYv1CQEkMy8VAUSs/BrMPm4+S1jP1n7kbz7El5aTPCyN/XsQbjY3iiFpu3/P2gGZ+T3/hsJdeyI23qgicA8yQDT0LdRuaV0+Ou8dDwZ1RAMpzjF3EVLUP89YrqwU01CGWPYxAzZPWRj23I= ARC-Authentication-Results: i=1; sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mzijespc DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F08654BA2E13 Received: by mail-dy1-x132b.google.com with SMTP id 5a478bee46e88-30c944aacbaso741601eec.1 for ; Fri, 26 Jun 2026 23:06:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1782540399; x=1783145199; darn=sourceware.org; h=mime-version:message-id:date:user-agent:references:in-reply-to :subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=RfNeGQn59Q8azWSrDTvHu3++avL6ntXceFAFIpnldkg=; b=mzijespccpvJrXso9fPXDfVtp7t+rq46vtF+UE1fEJIMJStZx1MMEuFTynnFqG4oFv Wip1KwxXeOaik3EFERsvy/ircR8KZglb07/WGi/m33ONDBJ4yWusNa0P0PPJZQR9sfbv 1LpJ9RK8B0Jli07/vn8dAeCtVZSLF/YvFUVQ3cZTmAQVylyLJrO2ZAOifu54g2Cf0z71 oydpWvthjnIcsf+oNHA4xhQl6+Ylpy3d7YSQnXH3uV00ZyCfuRVmWjbAxIwb/SYQHTqF OrguXqDNP2PTo8vzUdHe/7zFlqJyO1nLhseqGO82hPWyd+EAS+ivX4pWzxyr78W++cIo 7KtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1782540399; x=1783145199; h=mime-version:message-id:date:user-agent:references:in-reply-to :subject:cc:to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=RfNeGQn59Q8azWSrDTvHu3++avL6ntXceFAFIpnldkg=; b=ma1ZnCxeL7I56hHSl2RZ+Cvu5S2hH3hl8ZxQQCkjg+u+TLNhr5Fky8Ll9zMlXPLx/G 9rcd0sDj0/o5ntDvMzJbAkBns9/d1GIOgWoJRDQjejfaGDm3Ef9vl3M757Pjon26kZxb OhYXiThQYlq3EAKsKXIr0d7W6joHr1slH5aqyfL8DwiDpR8noM3uV0+D99nkctyw4qyR vSUt3OwbxzjeZANVMlG3/CcajgPeJB2521pk60vh5oqvGPJydqbVe36lwiGoVHtJ846I wcow6TagQHTyoglUe6H95WdkTsKTGQcfaDabE/lqSmy5y8DiJDZ4pHmmdzXUso632kdu eTQQ== X-Gm-Message-State: AOJu0Yzu/SfIi1M2iD1ujg95cdOJPqRViu9bgf2TiPyObbOgIZ2kbenj pt7ZhInV16oXmRB1dX56zz6jgFPXmfI1ZjAwzcUfuisAtM8wgJpPXBga25mxfLcD2RI= X-Gm-Gg: AfdE7cnO3zcsMZldQusFEFaBhftFbx+CD8vCUr10SiDrnWEbhAi4zieYXzwQ6OXeDpr Jy1V5Ok4C049POGt4RvgiEgLT5/9ztVpYsbL2S4Seb933gwPmcmpxzO6jqTIF+m4smkplf0ojsX okcwDbGRKOGMwjAvdjuAPlmN9rmYsZWIa5yTj5I8jW+g/mCY7/5jwVgmjbmIEmULeSUkWJS21eX 6PCtH2oMRweIxtguKt9nKT2TfsKwV/vaLFbyd2TOYuMX6f5qHDr6QJ3oiOi6HK3WvXtA50J0XXV YpRBqYM5gdrAty86ib8csJui3UX1sode+v5ArBC5aUXq2nsjmKcDit06YqbSpdYzfgmdcRKQaut VQUAMDCHFKf0Nj3dt5dF+fVNL19FACNIy7jFRjecFK4XH2y5mqVwr+2jh6F1Ia7GLBCqU+2HOpx Hv9jz+x6vMcVLw804akhzxpPg= X-Received: by 2002:a05:7300:cb87:b0:30b:f888:7821 with SMTP id 5a478bee46e88-30c850a2bd2mr10594052eec.28.1782540398690; Fri, 26 Jun 2026 23:06:38 -0700 (PDT) Received: from localhost ([2804:14d:7e39:8083:f04c:42e3:5943:38f6]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-30cf86deed5sm2843340eec.1.2026.06.26.23.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jun 2026 23:06:38 -0700 (PDT) From: Thiago Jung Bauermann To: Cc: , , , , Subject: Re: [PATCH v2 1/7] gdb/aarch64: Add POR_EL0 register support for FEAT_S1POE In-Reply-To: <20260626180821.376406-2-srinath.parvathaneni@arm.com> (srinath parvathaneni's message of "Fri, 26 Jun 2026 18:08:15 +0000") References: <20260626180821.376406-1-srinath.parvathaneni@arm.com> <20260626180821.376406-2-srinath.parvathaneni@arm.com> User-Agent: mu4e 1.14.2; emacs 30.2 Date: Sat, 27 Jun 2026 06:06:35 +0000 Message-ID: <87a4sgikk4.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org Hello Srinath, writes: > From: Srinath Parvathaneni > > Add support for the FEAT_S1POE POR_EL0 register on AArch64. > > This patch adds POR_EL0 to the AArch64 register set and reads/writes it > using the NT_ARM_POE ptrace regset. > > With this change, POR_EL0 is available through: > * info registers > * info registers por_el0 > * p $por_el0 > * p/x $por_el0 > * set $por_el0 = One question, more about general policy on the AArch64 GDB port: Should the register name have the _el0 suffix? It's more than half of the register name (though tab completion helps). We don't currently have that suffix in the name of any register. And in the case of Guarded Control Stack, I didn't add it. For native debugging, it will always be the register at EL0. For remote debugging, I assumed the target would send the register corresponding to the current exception level in the inferior. Can there be a situation where it would be possible to see both the EL0 and EL1 (for example) registers at the same time? Or a situation where the inferior is at EL1 but one wants to see the register at EL0, or vice-versa? > --- > gdb/Makefile.in | 2 ++ > gdb/aarch64-linux-nat.c | 66 ++++++++++++++++++++++++++++++++++++ > gdb/aarch64-linux-tdep.c | 1 + > gdb/aarch64-tdep.c | 18 ++++++++++ > gdb/aarch64-tdep.h | 11 +++++- > gdb/arch/aarch64-poe-linux.h | 29 ++++++++++++++++ > gdb/arch/aarch64.c | 4 +++ > gdb/arch/aarch64.h | 7 +++- > gdb/features/Makefile | 1 + > gdb/features/aarch64-poe.c | 14 ++++++++ > gdb/features/aarch64-poe.xml | 12 +++++++ > gdb/nat/aarch64-poe-linux.h | 28 +++++++++++++++ > include/elf/common.h | 2 ++ > 13 files changed, 193 insertions(+), 2 deletions(-) > create mode 100644 gdb/arch/aarch64-poe-linux.h > create mode 100644 gdb/features/aarch64-poe.c > create mode 100644 gdb/features/aarch64-poe.xml > create mode 100644 gdb/nat/aarch64-poe-linux.h > > diff --git a/gdb/Makefile.in b/gdb/Makefile.in > index 57f384170ab..3dc9cd07dcb 100644 > --- a/gdb/Makefile.in > +++ b/gdb/Makefile.in > @@ -1292,6 +1292,7 @@ HFILES_NO_SRCDIR = \ > arch/aarch32.h \ > arch/aarch64-fpmr-linux.h \ > arch/aarch64-gcs-linux.h \ > + arch/aarch64-poe-linux.h \ > arch/aarch64.h \ > arch/aarch64-insn.h \ > arch/aarch64-mte.h \ > @@ -1540,6 +1541,7 @@ HFILES_NO_SRCDIR = \ > namespace.h \ > nat/aarch64-fpmr-linux.h \ > nat/aarch64-gcs-linux.h \ > + nat/aarch64-poe-linux.h \ > nat/aarch64-hw-point.h \ > nat/aarch64-linux.h \ > nat/aarch64-linux-hw-point.h \ > diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c > index 52ace4aab41..54265920d69 100644 > --- a/gdb/aarch64-linux-nat.c > +++ b/gdb/aarch64-linux-nat.c > @@ -34,6 +34,7 @@ > #include "arch/arm.h" > #include "nat/aarch64-fpmr-linux.h" > #include "nat/aarch64-gcs-linux.h" > +#include "nat/aarch64-poe-linux.h" > #include "nat/aarch64-linux.h" > #include "nat/aarch64-linux-hw-point.h" > #include "nat/aarch64-mte-linux-ptrace.h" > @@ -569,6 +570,54 @@ fetch_gcsregs_from_thread (regcache *regcache) > &user_gcs.features_locked); > } > > +/* Fill GDB's register array with the POE register value from the current > + thread. */ > + > +static void > +fetch_poeregs_from_thread (regcache *regcache) > +{ > + aarch64_gdbarch_tdep *tdep > + = gdbarch_tdep (regcache->arch ()); > + > + gdb_assert (tdep->has_poe ()); > + > + uint64_t user_poe; > + iovec iovec; > + > + iovec.iov_base = &user_poe; > + iovec.iov_len = sizeof (user_poe); > + > + int tid = get_ptrace_pid (regcache->ptid ()); > + if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_POE, &iovec) != 0) > + perror_with_name (_("Unable to fetch POE register")); > + > + regcache->raw_supply (tdep->poe_regnum, &user_poe); > +} > + > +/* Store the NT_ARM_POE register contents from GDB's REGCACHE to the > + thread associated with REGCACHE. */ > + > +static void > +store_poeregs_to_thread (struct regcache *regcache) > +{ > + aarch64_gdbarch_tdep *tdep > + = gdbarch_tdep (regcache->arch ()); > + > + gdb_assert (tdep->has_poe ()); > + > + int tid = regcache->ptid ().lwp (); > + > + iovec iovec; > + uint64_t user_poe; > + iovec.iov_base = &user_poe; > + iovec.iov_len = sizeof (user_poe); > + > + regcache->raw_collect (tdep->poe_regnum, &user_poe); > + > + if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_POE, &iovec) != 0) > + perror_with_name (_("Unable to store POE register")); > +} > + > /* Store to the current thread the valid GCS register set in the GDB's > register array. */ These functions are fine, but they were added between fetch_gcsregs_from_thread and store_gcsregs_to_thread. For better organization of the file, they should be either before or after the GCS ones. > @@ -683,6 +732,9 @@ aarch64_fetch_registers (struct regcache *regcache, int regno) > if (tdep->has_gcs_linux ()) > fetch_gcsregs_from_thread (regcache); > > + if (tdep->has_poe ()) > + fetch_poeregs_from_thread (regcache); > + > if (tdep->has_fpmr ()) > fetch_fpmr_from_thread (regcache); > } > @@ -722,6 +774,10 @@ aarch64_fetch_registers (struct regcache *regcache, int regno) > && (regno == tdep->gcs_reg_base || regno == tdep->gcs_linux_reg_base > || regno == tdep->gcs_linux_reg_base + 1)) > fetch_gcsregs_from_thread (regcache); > + /* POE register? */ > + else if (tdep->has_poe () && (regno == tdep->poe_regnum)) > + fetch_poeregs_from_thread (regcache); > + Please remove the extra blank line here. > /* FPMR? */ > else if (tdep->has_fpmr () && (regno == tdep->fpmr_regnum)) > fetch_fpmr_from_thread (regcache); > @@ -802,6 +858,9 @@ aarch64_store_registers (struct regcache *regcache, int regno) > > if (tdep->has_fpmr ()) > store_fpmr_to_thread (regcache); > + > + if (tdep->has_poe ()) > + store_poeregs_to_thread (regcache); > } > /* General purpose register? */ > else if (regno < AARCH64_V0_REGNUM) > @@ -837,6 +896,10 @@ aarch64_store_registers (struct regcache *regcache, int regno) > else if (tdep->has_fpmr () && regno == tdep->fpmr_regnum) > store_fpmr_to_thread (regcache); > Please remove the extra blank line here. The else ifs should be joined. > + /* POE register? */ > + else if (tdep->has_poe () && regno == tdep->poe_regnum) > + store_poeregs_to_thread (regcache); > + > /* PAuth registers are read-only. */ > } > > @@ -1024,6 +1087,9 @@ aarch64_linux_nat_target::read_description () > /* Check for FPMR. */ > features.fpmr = hwcap2 & HWCAP2_FPMR; > > + /* Check for POE support. */ > + features.poe = hwcap2 & HWCAP2_POE; > + > return aarch64_read_description (features); > } > > diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c > index f11eccc1bc1..4a6bc3158c8 100644 > --- a/gdb/aarch64-linux-tdep.c > +++ b/gdb/aarch64-linux-tdep.c > @@ -53,6 +53,7 @@ > > #include "arch/aarch64-fpmr-linux.h" > #include "arch/aarch64-gcs-linux.h" > +#include "arch/aarch64-poe-linux.h" > #include "arch/aarch64-mte.h" > #include "arch/aarch64-mte-linux.h" > #include "arch/aarch64-pauth-linux.h" This should be moved to the patch that makes use of the new header. > diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c > index 886e7ce1e7b..f1e1a9c7a19 100644 > --- a/gdb/aarch64-tdep.c > +++ b/gdb/aarch64-tdep.c > @@ -164,6 +164,11 @@ static const char *const aarch64_gcs_register_names[] = { > "gcspr" > }; > > +static const char *const aarch64_poe_register_names[] = { > + /* Permission Overlay Extension Register. */ > + "por_el0" > +}; > + > static const char *const aarch64_gcs_linux_register_names[] = { > /* Field in struct user_gcs. */ > "gcs_features_enabled", > @@ -4556,6 +4561,19 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) > fpmr_regnum, "fpmr"); > } > > + int poe_regnum = -1; > + const struct tdesc_feature *feature_poe > + = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.poe"); > + if (feature_poe != nullptr) > + { > + poe_regnum = num_regs; > + for (i = 0; i < ARRAY_SIZE (aarch64_poe_register_names); i++) > + valid_p &= tdesc_numbered_register (feature_poe, tdesc_data.get (), > + poe_regnum + i, > + aarch64_poe_register_names[i]); > + num_regs++; > + } > + > int first_sme_regnum = -1; > int first_sme2_regnum = -1; > int first_sme_pseudo_regnum = -1; > diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h > index dff05a08f84..8029725b145 100644 > --- a/gdb/aarch64-tdep.h > +++ b/gdb/aarch64-tdep.h > @@ -208,6 +208,16 @@ struct aarch64_gdbarch_tdep : gdbarch_tdep_base > return gcs_linux_reg_base != -1; > } > > + /* POE register. This is -1 if no POE feature is available. */ > + int poe_regnum = -1; > + > + /* Returns true if the target supports the Linux POE feature. */ Remove the "Linux" word, since the feature isn't specific to it, and also because this header file isn't OS-specific. > + bool > + has_poe () const > + { > + return poe_regnum != -1; > + } > + > /* First FPMR register. This is -1 if FPMR is not supported. */ > int fpmr_regnum = -1; > > @@ -224,7 +234,6 @@ aarch64_features_from_target_desc (const struct target_desc *tdesc); > > extern int aarch64_process_record (struct gdbarch *gdbarch, > struct regcache *regcache, CORE_ADDR addr); > - > displaced_step_copy_insn_closure_up > aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch, > CORE_ADDR from, CORE_ADDR to, This change is unrelated to this patch. > diff --git a/gdb/arch/aarch64.c b/gdb/arch/aarch64.c > index 2401a325b7b..a567938d06d 100644 > --- a/gdb/arch/aarch64.c > +++ b/gdb/arch/aarch64.c > @@ -28,6 +28,7 @@ > #include "../features/aarch64-sme2.c" > #include "../features/aarch64-tls.c" > #include "../features/aarch64-gcs.c" > +#include "../features/aarch64-poe.c" > #include "../features/aarch64-gcs-linux.c" > > /* See arch/aarch64.h. */ > @@ -77,6 +78,9 @@ aarch64_create_target_description (const aarch64_features &features) > if (features.fpmr) > regnum = create_feature_aarch64_fpmr (tdesc.get (), regnum); > > + if (features.poe) > + regnum = create_feature_aarch64_poe (tdesc.get (), regnum); > + > return tdesc; > } > > diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h > index cf7318cbe74..4e4b50f729e 100644 > --- a/gdb/arch/aarch64.h > +++ b/gdb/arch/aarch64.h > @@ -35,6 +35,7 @@ struct aarch64_features > bool pauth = false; > bool mte = false; > bool fpmr = false; > + bool poe = false; You should add a comment for this boolean, as mentioned by Matthieu and Luis. Luis gave a good suggestion for the comment. > diff --git a/gdb/features/aarch64-poe.xml b/gdb/features/aarch64-poe.xml > new file mode 100644 > index 00000000000..43ee09e01d6 > --- /dev/null > +++ b/gdb/features/aarch64-poe.xml > @@ -0,0 +1,12 @@ > + > + > + > + > + > + Please remove the extra blank line here. > + > + > diff --git a/gdb/nat/aarch64-poe-linux.h b/gdb/nat/aarch64-poe-linux.h > new file mode 100644 > index 00000000000..3d858d3ff92 > --- /dev/null > +++ b/gdb/nat/aarch64-poe-linux.h > @@ -0,0 +1,28 @@ > +/* Common native Linux definitions for AArch64 Permission Overlay Extension. > + > + Copyright (C) 2026 Free Software Foundation, Inc. > + > + This file is part of GDB. > + > + This program is free software; you can redistribute it and/or modify > + it under the terms of the GNU General Public License as published by > + the Free Software Foundation; either version 3 of the License, or > + (at your option) any later version. > + > + This program is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + GNU General Public License for more details. > + > + You should have received a copy of the GNU General Public License > + along with this program. If not, see . */ > + > +#ifndef GDB_NAT_AARCH64_POE_LINUX_H > +#define GDB_NAT_AARCH64_POE_LINUX_H > + This file should include so that the system definition is used if available. > +/* Feature check for Permission Overlay Extension. */ > +#ifndef HWCAP2_POE > +#define HWCAP2_POE (1ULL << 63) > +#endif /* HWCAP2_POE */ > + > +#endif /* GDB_NAT_AARCH64_POE_LINUX_H */ > diff --git a/include/elf/common.h b/include/elf/common.h > index 1ae68221a89..f811b8daeb5 100644 > --- a/include/elf/common.h > +++ b/include/elf/common.h > @@ -760,6 +760,8 @@ > /* Note: name must be "LINUX". */ > #define NT_ARM_FPMR 0x40e /* AArch64 FPMR. */ > /* Note: name must be "LINUX". */ > +#define NT_ARM_POE 0x40f /* AArch64 POE register. */ > + /* Note: name must be "LINUX". */ > #define NT_ARM_GCS 0x410 /* AArch64 Guarded Control Stack > registers. */ > /* Note name must be "LINUX". */ This file is under binutils' "jurisdiction", so you should move this change to the bfd/readelf patch. And consequently also move that patch to become the first of the series, since this patch needs the definition above. Finally, the bfd/readelf patch should be cc'd to the binutils mailing list. Or alternatively sent there separately from this series. -- Thiago (he/him)