From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 56097 invoked by alias); 27 Apr 2017 10:17:17 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 56087 invoked by uid 89); 27 Apr 2017 10:17:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-spam-relays-external:74.125.82.68, H*RU:74.125.82.68 X-HELO: mail-wm0-f68.google.com Received: from mail-wm0-f68.google.com (HELO mail-wm0-f68.google.com) (74.125.82.68) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Apr 2017 10:17:14 +0000 Received: by mail-wm0-f68.google.com with SMTP id z129so3527908wmb.1 for ; Thu, 27 Apr 2017 03:17:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:references:date:in-reply-to :message-id:user-agent:mime-version:content-transfer-encoding; bh=Vybcn3IfqPYr77xzgfy3a91M+3YEHn+5H5VjfzMvW7Y=; b=rA6ZQk/TFXNJ1Cc2O0VGiO9kmO9IwnllzdkdbfD6PRpOS1iRAFugRTtw1QL2wH8/ir gP0kPLq6QWuOoO1V6nVSoy5W93RvBNq8C7YJMSNPgBesSepihUvjEcAw4uSFI1GfgmdY 7vTpkfmqa60hnR7Jdckh7p3iKnN/okA+lodWq23jGkzj4rrSNfA3QGAuNBBrRVC2Rtzr DrqFb5WL1R7OT5nJSDxsf9KhOBeJVJCepk6XvTAUO1I1SNmAB+1Vl7H7W0LyLvFURThH qmqoVjhFqgQyVJXEshzbJAmEHnNJlD7gcLIZZB2tP1vlYHmvIgDrmhn4xU9a0lO+Qu8o Hjeg== X-Gm-Message-State: AN3rC/6mvDv3C9FkANdjNcXjIPNQVKa7aijfXDuPOqZkqdY+LBkCMO04 i1Lq4f6Hkl9BeA== X-Received: by 10.28.133.139 with SMTP id h133mr1740301wmd.87.1493288234765; Thu, 27 Apr 2017 03:17:14 -0700 (PDT) Received: from E107787-LIN ([194.214.185.158]) by smtp.gmail.com with ESMTPSA id 187sm10236528wmt.16.2017.04.27.03.17.13 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 27 Apr 2017 03:17:14 -0700 (PDT) From: Yao Qi To: Alan Hayward Cc: "gdb-patches\@sourceware.org" , nd Subject: Re: [PATCH 2/11] Add IA64_MAX_REGISTER_SIZE References: <8637dnqils.fsf@gmail.com> <90F5717F-8685-4C74-B2E4-7317AF228034@arm.com> <86pogivp7m.fsf@gmail.com> <0CAAE3E4-1860-40FF-895E-6C6A54A4EAB6@arm.com> <86vapsqxld.fsf@gmail.com> <498D342A-2994-4664-968D-F97A80C66059@arm.com> Date: Thu, 27 Apr 2017 10:17:00 -0000 In-Reply-To: <498D342A-2994-4664-968D-F97A80C66059@arm.com> (Alan Hayward's message of "Wed, 26 Apr 2017 10:38:48 +0000") Message-ID: <86mvb2p32v.fsf@gmail.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2017-04/txt/msg00732.txt.bz2 Alan Hayward writes: Hi Alan, As I keep saying, please split your patch. You have two complete different approaches in this patch to remove MAX_FP_REGISTER_SIZE, and each of them is independent of the other. One looks very correct to me but I am not sure the other one. This leads to that part of the patch can go in. > 2017-04-26 Alan Hayward > > * ia64-tdep.c (IA64_MAX_FP_REGISTER_SIZE) Add. > (ia64_register_to_value): Use IA64_MAX_FP_REGISTER_SIZE. > (ia64_value_to_register): Likewise. > (examine_prologue): Use get_frame_register_unsigned. > (ia64_sigtramp_frame_prev_register): Use extract_unsigned_integer. Use read_memory_unsigned_integer. > (ia64_access_reg): Likewise. Use get_frame_register_unsigned. > (ia64_access_rse_reg): Likewise. > (ia64_libunwind_frame_prev_register): Likewise. > (ia64_extract_return_value): Use IA64_MAX_FP_REGISTER_SIZE. > (ia64_store_return_value): Likewise. > (ia64_push_dummy_call): Likewise. > > > diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c > index 22e158866bbbf0d9457737ac973027521e2c1655..4f19e15acdcf34816c10bcab6= 884659c6688f6bf 100644 > --- a/gdb/ia64-tdep.c > +++ b/gdb/ia64-tdep.c > @@ -1516,7 +1519,6 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, > else if (qp =3D=3D 0 && rN =3D=3D 2 > && ((rM =3D=3D fp_reg && fp_reg !=3D 0) || rM =3D=3D 12)) > { > - gdb_byte buf[MAX_REGISTER_SIZE]; > CORE_ADDR saved_sp =3D 0; > /* adds r2, spilloffset, rFramePointer > or > @@ -1533,9 +1535,8 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, > if (this_frame) > { > struct gdbarch *gdbarch =3D get_frame_arch (this_frame); > - enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); > - get_frame_register (this_frame, sp_regnum, buf); > - saved_sp =3D extract_unsigned_integer (buf, 8, byte_order); > + saved_sp =3D get_frame_register_unsigned (this_frame, > + sp_regnum); > } > spill_addr =3D saved_sp > + (rM =3D=3D 12 ? 0 : mem_stack_frame_size) > @@ -2289,10 +2290,6 @@ static struct value * > ia64_sigtramp_frame_prev_register (struct frame_info *this_frame, > void **this_cache, int regnum) > { > - gdb_byte buf[MAX_REGISTER_SIZE]; > - > - struct gdbarch *gdbarch =3D get_frame_arch (this_frame); > - enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); > struct ia64_frame_cache *cache =3D > ia64_sigtramp_frame_cache (this_frame, this_cache); > > @@ -2308,8 +2305,9 @@ ia64_sigtramp_frame_prev_register (struct frame_inf= o *this_frame, > > if (addr !=3D 0) > { > - read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM)); > - pc =3D extract_unsigned_integer (buf, 8, byte_order); > + struct gdbarch *gdbarch =3D get_frame_arch (this_frame); > + enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); > + pc =3D read_memory_unsigned_integer (addr, 8, byte_order); > } > pc &=3D ~0xf; > return frame_unwind_got_constant (this_frame, regnum, pc); > @@ -2490,12 +2488,11 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_= t uw_regnum, unw_word_t *val, > int write, void *arg) > { > int regnum =3D ia64_uw2gdb_regnum (uw_regnum); > - unw_word_t bsp, sof, sol, cfm, psr, ip; > + unw_word_t bsp, sof, cfm, psr, ip; > struct frame_info *this_frame =3D (struct frame_info *) arg; > struct gdbarch *gdbarch =3D get_frame_arch (this_frame); > enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); > long new_sof, old_sof; > - gdb_byte buf[MAX_REGISTER_SIZE]; > > /* We never call any libunwind routines that need to write registers. = */ > gdb_assert (!write); > @@ -2505,10 +2502,8 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t= uw_regnum, unw_word_t *val, > case UNW_REG_IP: > /* Libunwind expects to see the pc value which means the slot number > from the psr must be merged with the ip word address. */ > - get_frame_register (this_frame, IA64_IP_REGNUM, buf); > - ip =3D extract_unsigned_integer (buf, 8, byte_order); > - get_frame_register (this_frame, IA64_PSR_REGNUM, buf); > - psr =3D extract_unsigned_integer (buf, 8, byte_order); > + ip =3D get_frame_register_unsigned (this_frame, IA64_IP_REGNUM); > + psr =3D get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM); > *val =3D ip | ((psr >> 41) & 0x3); > break; > > @@ -2517,10 +2512,8 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t= uw_regnum, unw_word_t *val, > register frame so we must account for the fact that > ptrace() will return a value for bsp that points *after* > the current register frame. */ > - get_frame_register (this_frame, IA64_BSP_REGNUM, buf); > - bsp =3D extract_unsigned_integer (buf, 8, byte_order); > - get_frame_register (this_frame, IA64_CFM_REGNUM, buf); > - cfm =3D extract_unsigned_integer (buf, 8, byte_order); > + bsp =3D get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); > + cfm =3D get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); > sof =3D gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm= ); > *val =3D ia64_rse_skip_regs (bsp, -sof); > break; > @@ -2528,14 +2521,12 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_= t uw_regnum, unw_word_t *val, > case UNW_IA64_AR_BSPSTORE: > /* Libunwind wants bspstore to be after the current register frame. > This is what ptrace() and gdb treats as the regular bsp value. */ > - get_frame_register (this_frame, IA64_BSP_REGNUM, buf); > - *val =3D extract_unsigned_integer (buf, 8, byte_order); > + *val =3D get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); > break; > > default: > /* For all other registers, just unwind the value directly. */ > - get_frame_register (this_frame, regnum, buf); > - *val =3D extract_unsigned_integer (buf, 8, byte_order); > + *val =3D get_frame_register_unsigned (this_frame, regnum); > break; > } > > @@ -2570,12 +2561,11 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_reg= num_t uw_regnum, > unw_word_t *val, int write, void *arg) > { > int regnum =3D ia64_uw2gdb_regnum (uw_regnum); > - unw_word_t bsp, sof, sol, cfm, psr, ip; > + unw_word_t bsp, sof, cfm, psr, ip; > struct regcache *regcache =3D (struct regcache *) arg; > struct gdbarch *gdbarch =3D get_regcache_arch (regcache); > enum bfd_endian byte_order =3D gdbarch_byte_order (gdbarch); > long new_sof, old_sof; > - gdb_byte buf[MAX_REGISTER_SIZE]; > > /* We never call any libunwind routines that need to write registers. = */ > gdb_assert (!write); > @@ -2585,10 +2575,8 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regn= um_t uw_regnum, > case UNW_REG_IP: > /* Libunwind expects to see the pc value which means the slot number > from the psr must be merged with the ip word address. */ > - regcache_cooked_read (regcache, IA64_IP_REGNUM, buf); > - ip =3D extract_unsigned_integer (buf, 8, byte_order); > - regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf); > - psr =3D extract_unsigned_integer (buf, 8, byte_order); > + regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip); > + regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr); > *val =3D ip | ((psr >> 41) & 0x3); > break; > > @@ -2597,10 +2585,8 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regn= um_t uw_regnum, > register frame so we must account for the fact that > ptrace() will return a value for bsp that points *after* > the current register frame. */ > - regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf); > - bsp =3D extract_unsigned_integer (buf, 8, byte_order); > - regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf); > - cfm =3D extract_unsigned_integer (buf, 8, byte_order); > + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); > + regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); > sof =3D (cfm & 0x7f); > *val =3D ia64_rse_skip_regs (bsp, -sof); > break; > @@ -2608,14 +2594,12 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_reg= num_t uw_regnum, > case UNW_IA64_AR_BSPSTORE: > /* Libunwind wants bspstore to be after the current register frame. > This is what ptrace() and gdb treats as the regular bsp value. */ > - regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf); > - *val =3D extract_unsigned_integer (buf, 8, byte_order); > + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val); > break; > > default: > /* For all other registers, just unwind the value directly. */ > - regcache_cooked_read (regcache, regnum, buf); > - *val =3D extract_unsigned_integer (buf, 8, byte_order); > + regcache_cooked_read_unsigned (regcache, regnum, val); > break; > } > > @@ -2982,12 +2966,10 @@ ia64_libunwind_frame_prev_register (struct frame_= info *this_frame, > { > int rrb_pr =3D 0; > ULONGEST cfm; > - gdb_byte buf[MAX_REGISTER_SIZE]; > > /* Fetch predicate register rename base from current frame > marker for this frame. */ > - get_frame_register (this_frame, IA64_CFM_REGNUM, buf); > - cfm =3D extract_unsigned_integer (buf, 8, byte_order); > + cfm =3D get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); > rrb_pr =3D (cfm >> 32) & 0x3f; > > /* Adjust the register number to account for register rotation. */ This part of the patch (not using IA64_MAX_FP_REGISTER_SIZE) is good to me. --=20 Yao (=E9=BD=90=E5=B0=A7)