From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id qj+mCtDLHmoivS8AWB0awg (envelope-from ) for ; Tue, 02 Jun 2026 08:25:52 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=gnu.org header.i=@gnu.org header.a=rsa-sha256 header.s=fencepost-gnu-org header.b=GxjWyXIG; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 1B3DA1E0A3; Tue, 02 Jun 2026 08:25:52 -0400 (EDT) X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-25) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-6.4 required=5.0 tests=ARC_SIGNED,ARC_VALID,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham autolearn_force=no version=4.0.1 Received: from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 8A6F41E062 for ; Tue, 02 Jun 2026 08:25:51 -0400 (EDT) Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A81A24BA2E2B for ; Tue, 2 Jun 2026 12:25:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A81A24BA2E2B Authentication-Results: sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=gnu.org header.i=@gnu.org header.a=rsa-sha256 header.s=fencepost-gnu-org header.b=GxjWyXIG Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 843484BA2E11 for ; Tue, 2 Jun 2026 12:25:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 843484BA2E11 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gnu.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 843484BA2E11 Authentication-Results: sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1780403125; cv=none; b=ooGlTXqjZIAeVEPa2KDNB2qHGCoNqAob8tEaezZnN3vxurOllv0MQCn6FUActU6vp33PnWF5gSw9C+Htqw94+CCEEygr5MjRSONqVi2+VAIEfpBvO2/gMcF4tDBmeKESKYtmVZRw6K8w6YtLcvjzWFy/cq04ZL/C83mgETJJhT0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1780403125; c=relaxed/simple; bh=PIg+EswdyDsTQuoq4VzexWn6IHL4iINZsA84Y1HRrqo=; h=DKIM-Signature:Date:Message-Id:From:To:Subject; b=nWARek19iY0dyWM/DpM9tfL0LRYN0CchRR8jBEUNak8+KR10ksi6hVyhHUuOi7Q9n6nyR/rINSuCmW6MLk6At8T9HkBfbYWfF1xkdf58ql8JVjOkvdaFN+TNn4JbrIAONkdVUpHxk+4OKRuFcCntY70yTDa5ejqFrLn5rAKtMGQ= ARC-Authentication-Results: i=1; sourceware.org; dkim=pass (2048-bit key, unprotected) header.d=gnu.org header.i=@gnu.org header.a=rsa-sha256 header.s=fencepost-gnu-org header.b=GxjWyXIG DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 843484BA2E11 Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wUOBQ-0005BG-N1; Tue, 02 Jun 2026 08:25:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=References:Subject:In-Reply-To:To:From:Date: mime-version; bh=1wHTKqNitteREOr1LtNSxEpCm8Xde2lC1vYNBCIwIN0=; b=GxjWyXIGvkmo iqg90xDc9ObbBANetdLFaW8vdnooTjB/RPEzLR/wWnoPqS3GcovvkU5PvbEOsHIovXu68SFREFPHn QhMDMtsjnuf92m9I75pmewW3879HIRb7XbvOwkkKNesvJk42Z1npyAaS2uA6rMZL1y6gY+9gwUEfO HNjl7nbJJT5j14WMI3Bic0qvpQMZpyyOeWQDuODyNFP6btAcvzd4lqMsGt5N1hRTQl0mmcGF/lB9k Ej9CYWKzpOAmPWotvxPbyK1E8U+K6akQobGlD9ooWN8rup767/o43hjefXzxrcuQyPFHRSYrHjGkx tidmdwchIQz+34ZpelbeNg==; Date: Tue, 02 Jun 2026 15:25:21 +0300 Message-Id: <865x41w2mm.fsf@gnu.org> From: Eli Zaretskii To: Christina Schimpe Cc: gdb-patches@sourceware.org, hjl.tools@gmail.com, keiths@redhat.com In-Reply-To: <20260602111122.3187712-3-christina.schimpe@intel.com> (message from Christina Schimpe on Tue, 2 Jun 2026 11:11:22 +0000) Subject: Re: [PATCH 2/2] gdb, gdbserver: Add Intel APX register support References: <20260602111122.3187712-1-christina.schimpe@intel.com> <20260602111122.3187712-3-christina.schimpe@intel.com> X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org > From: Christina Schimpe > Cc: hjl.tools@gmail.com, > keiths@redhat.com > Date: Tue, 2 Jun 2026 11:11:22 +0000 > > From: "H.J. Lu" > > Intel(R) Advanced Performance Extensions (APX) doubles the number of > general-purpose registers (GPRs) from 16 to 32 (r16-r31). > > Those new 64-bit Extended GPRs (EGPRs) do not change the size of the > XSAVE area, as they take up the space left behind by the deprecated > MPX registers. > > In contrast to the legacy GPRS, EGPRs are not enabled by default in 64-bit > mode but are xcr0 enabled based on APX_F Intel APX state. Define > X86_XSTATE_APX_F to support this new configuration. > > Add gdb and gdbserver registers support for those new 64-bit EGPRs. > Also add byte, word and dword pseudo register support. > > Co-authored-by: Christina Schimpe > --- > gdb/NEWS | 4 + > gdb/amd64-linux-tdep.c | 2 + > gdb/amd64-tdep.c | 262 ++++++++++++++---- > gdb/amd64-tdep.h | 2 + > gdb/arch/amd64.c | 4 + > gdb/arch/x86-linux-tdesc-features.c | 1 + > gdb/doc/gdb.texinfo | 4 + > gdb/features/Makefile | 1 + > gdb/features/i386/64bit-apx.c | 29 ++ > gdb/features/i386/64bit-apx.xml | 26 ++ > gdb/i386-tdep.c | 32 ++- > gdb/i386-tdep.h | 26 ++ > gdb/i387-tdep.c | 105 ++++++- > gdb/i387-tdep.h | 6 + > gdb/nat/x86-xstate.c | 1 + > gdb/target-debug.h | 1 + > gdb/testsuite/gdb.arch/amd64-apx-corefile.exp | 87 ++++++ > gdb/testsuite/gdb.arch/amd64-apx.c | 83 ++++++ > gdb/testsuite/gdb.arch/amd64-apx.exp | 106 +++++++ > gdb/testsuite/lib/gdb.exp | 59 ++++ > gdbserver/i387-fp.cc | 43 +++ > gdbserver/linux-x86-low.cc | 4 +- > gdbsupport/x86-xstate.h | 12 +- > 23 files changed, 838 insertions(+), 62 deletions(-) > create mode 100644 gdb/features/i386/64bit-apx.c > create mode 100644 gdb/features/i386/64bit-apx.xml > create mode 100644 gdb/testsuite/gdb.arch/amd64-apx-corefile.exp > create mode 100644 gdb/testsuite/gdb.arch/amd64-apx.c > create mode 100644 gdb/testsuite/gdb.arch/amd64-apx.exp Thanks. > --- a/gdb/NEWS > +++ b/gdb/NEWS > @@ -83,6 +83,10 @@ > > * Support for native Thread Local Storage (TLS) variables on Windows. > > +* Support for Intel APX registers on amd64 GNU/Linux. > + Support displaying and modifying Intel APX registers (Extended GPRs > + $r16 - $r31) including byte, word and dword pseudo registers. This part is okay. > --- a/gdb/doc/gdb.texinfo > +++ b/gdb/doc/gdb.texinfo > @@ -50709,6 +50709,10 @@ amd64, 32 bits on amd64 with 32-bit pointer size (X32) and 32 bits on i386. > Following the restriction of the Linux kernel, only @value{GDBN} for amd64 > targets makes use of this feature for now. > > +The @samp{org.gnu.gdb.i386.apx} feature is optional. It should describe > +16 Extended General Purpose registers (EGPRs) @samp{r16} - @samp{r31} with > +64 bits each. All APX registers are valid only on amd64. "EGPR" and "APX" should be in @acronym. Reviewed-By: Eli Zaretskii