From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 105302 invoked by alias); 8 Jul 2015 16:42:31 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 105278 invoked by uid 89); 8 Jul 2015 16:42:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-HELO: mail-pa0-f41.google.com Received: from mail-pa0-f41.google.com (HELO mail-pa0-f41.google.com) (209.85.220.41) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 08 Jul 2015 16:42:28 +0000 Received: by pactm7 with SMTP id tm7so134507434pac.2 for ; Wed, 08 Jul 2015 09:42:26 -0700 (PDT) X-Received: by 10.66.221.163 with SMTP id qf3mr21782037pac.129.1436373746269; Wed, 08 Jul 2015 09:42:26 -0700 (PDT) Received: from E107787-LIN (gcc1-power7.osuosl.org. [140.211.15.137]) by smtp.gmail.com with ESMTPSA id kx14sm3074831pab.0.2015.07.08.09.42.24 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 08 Jul 2015 09:42:25 -0700 (PDT) From: Yao Qi To: Pierre Langlois Cc: gdb-patches@sourceware.org Subject: Re: [PATCH 0/8] [AArch64] Add support for tracepoints References: <1436273518-5959-1-git-send-email-pierre.langlois@arm.com> Date: Wed, 08 Jul 2015 16:42:00 -0000 In-Reply-To: <1436273518-5959-1-git-send-email-pierre.langlois@arm.com> (Pierre Langlois's message of "Tue, 7 Jul 2015 13:51:50 +0100") Message-ID: <864mlemwia.fsf@gmail.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-07/txt/msg00237.txt.bz2 Pierre Langlois writes: > These patches enable tracepoints for AArch64. Although tracepoints are > enabled in GDBServer with the last patch, most of the changes are in GDB. > The most important changes teach AArch64's frame unwinders to report when > the inferior is unavailable. > > The first three patches refactor the frame caches. The idea is to keep > accesses to the inferior's registers in aarch64_make_prologue_cache and > aarch64_make_stub_cache. This way the following patches can easily catch > exceptions when the inferior is unavailable. > > The following two patches teach AArch64's unwinders to terminate > gracefully, in a similar way as it was done for x86 here: > > https://sourceware.org/ml/gdb-patches/2011-02/msg00611.html > > It fixes cases where we do not have debugging information and AArch64's > unwinders need to be used when examining a trace buffer. In this context > we cannot assume that the inferior's memory and registers are > available. Beside Pedro's comments, we need a NEWS entry. Could you please write one? --=20 Yao (=E9=BD=90=E5=B0=A7)