[PATCH v5 18/25] AArch64: Add gdbserver MTE support

Luis Machado via Gdb-patches
2021-01-27T20:21:55Z

Updates on v4:

- Updated return types.
- Fixed alphabetical order of files.
- Use enum instead of magic integers.

Updates on v2:

- Updated target methods to contain a tag type parameter.

--

Adds the AArch64-specific memory tagging support (MTE) by implementing the
required hooks and checks for GDBserver.

gdbserver/ChangeLog:

YYYY-MM-DD Luis Machado <luis.machado@linaro.org>

* Makefile.in (SFILES): Add /../gdb/nat/aarch64-mte-linux-ptrace.c.
* configure.srv (aarch64*-*-linux*): Add arch/aarch64-mte-linux.o and
nat/aarch64-mte-linux-ptrace.o.
* linux-aarch64-low.cc: Include nat/aarch64-mte-linux-ptrace.h.
(class aarch64_target) <supports_memory_tagging>
<fetch_memtags, store_memtags>: New method overrides.
(aarch64_target::supports_memory_tagging)
(aarch64_target::fetch_memtags)
(aarch64_target::store_memtags): New methods.
---
gdbserver/Makefile.in | 1 +
gdbserver/configure.srv | 2 ++
gdbserver/linux-aarch64-low.cc | 61 ++++++++++++++++++++++++++++++++++
3 files changed, 64 insertions(+)

diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
index a14d3a7bc1..00370d55a3 100644
--- a/gdbserver/Makefile.in
+++ b/gdbserver/Makefile.in
@@ -229,6 +229,7 @@ SFILES = \
$(srcdir)/../gdb/arch/arm-linux.c \
$(srcdir)/../gdb/arch/ppc-linux-common.c \
$(srcdir)/../gdb/arch/riscv.c \
+ $(srcdir)/../gdb/nat/aarch64-mte-linux-ptrace.c \
$(srcdir)/../gdb/nat/aarch64-sve-linux-ptrace.c \
$(srcdir)/../gdb/nat/linux-btrace.c \
$(srcdir)/../gdb/nat/linux-namespaces.c \
diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
index 833ad27c4c..2dd8f75a4e 100644
--- a/gdbserver/configure.srv
+++ b/gdbserver/configure.srv
@@ -52,7 +52,9 @@ case "${gdbserver_host}" in
srv_tgtobj="$srv_tgtobj nat/aarch64-linux.o"
srv_tgtobj="$srv_tgtobj arch/aarch64-insn.o"
srv_tgtobj="$srv_tgtobj arch/aarch64.o"
+ srv_tgtobj="$srv_tgtobj arch/aarch64-mte-linux.o"
srv_tgtobj="$srv_tgtobj linux-aarch64-tdesc.o"
+ srv_tgtobj="$srv_tgtobj nat/aarch64-mte-linux-ptrace.o"
srv_tgtobj="$srv_tgtobj nat/aarch64-sve-linux-ptrace.o"
srv_tgtobj="${srv_tgtobj} $srv_linux_obj"
srv_linux_regsets=yes
diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc
index a066d963a5..daccfef746 100644
--- a/gdbserver/linux-aarch64-low.cc
+++ b/gdbserver/linux-aarch64-low.cc
@@ -43,6 +43,7 @@
#include "arch/aarch64-mte-linux.h"
#include "linux-aarch32-tdesc.h"
#include "linux-aarch64-tdesc.h"
+#include "nat/aarch64-mte-linux-ptrace.h"
#include "nat/aarch64-sve-linux-ptrace.h"
#include "tdesc.h"

@@ -50,6 +51,10 @@
#include <sys/reg.h>
#endif

+#ifdef HAVE_GETAUXVAL
+#include <sys/auxv.h>
+#endif
+
/* Linux target op definitions for the AArch64 architecture. */

class aarch64_target : public linux_process_target
@@ -82,6 +87,14 @@ public:

struct emit_ops *emit_ops () override;

+ bool supports_memory_tagging () override;
+
+ bool fetch_memtags (CORE_ADDR address, size_t len,
+ gdb::byte_vector &tags, int type) override;
+
+ bool store_memtags (CORE_ADDR address, size_t len,
+ const gdb::byte_vector &tags, int type) override;
+
protected:

void low_arch_setup () override;
@@ -3223,6 +3236,54 @@ aarch64_target::breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
return arm_breakpoint_kind_from_current_state (pcptr);
}

+/* Returns true if memory tagging is supported. */
+bool
+aarch64_target::supports_memory_tagging ()
+{
+ if (current_thread == NULL)
+ {
+ /* We don't have any processes running, so don't attempt to
+ use linux_get_hwcap2 as it will try to fetch the current
+ thread id. Instead, just fetch the auxv from the self
+ PID. */
+#ifdef HAVE_GETAUXVAL
+ return (getauxval (AT_HWCAP2) & HWCAP2_MTE) != 0;
+#else
+ return true;
+#endif
+ }
+
+ return (linux_get_hwcap2 (8) & HWCAP2_MTE) != 0;
+}
+
+bool
+aarch64_target::fetch_memtags (CORE_ADDR address, size_t len,
+ gdb::byte_vector &tags, int type)
+{
+ /* Allocation tags are per-process, so any tid is fine. */
+ int tid = lwpid_of (current_thread);
+
+ /* Allocation tag? */
+ if (type == static_cast <int> (aarch64_memtag_type::mte_allocation))
+ return aarch64_mte_fetch_memtags (tid, address, len, tags);
+
+ return false;
+}
+
+bool
+aarch64_target::store_memtags (CORE_ADDR address, size_t len,
+ const gdb::byte_vector &tags, int type)
+{
+ /* Allocation tags are per-process, so any tid is fine. */
+ int tid = lwpid_of (current_thread);
+
+ /* Allocation tag? */
+ if (type == static_cast <int> (aarch64_memtag_type::mte_allocation))
+ return aarch64_mte_store_memtags (tid, address, len, tags);
+
+ return false;
+}
+
/* The linux target ops object. */

linux_process_target *the_linux_target = &the_aarch64_target;
--
2.25.1