From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 58931 invoked by alias); 6 Aug 2019 09:56:26 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 58918 invoked by uid 89); 6 Aug 2019 09:56:26 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-5.5 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 06 Aug 2019 09:56:25 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ACF63337; Tue, 6 Aug 2019 02:56:23 -0700 (PDT) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.91]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 059643F706; Tue, 6 Aug 2019 02:56:22 -0700 (PDT) Subject: Re: [PATCH] AArch64: Allow additional sizes in prologue To: Alan Hayward , Tom Tromey Cc: "gdb-patches@sourceware.org" , nd References: <20190805124152.26127-1-alan.hayward@arm.com> <8736ifcxu8.fsf@tromey.com> <16866921-5116-49AE-A00E-9D738CE212BD@arm.com> From: "Richard Earnshaw (lists)" Message-ID: <793a518d-be9c-75f0-96a5-9acdc90d7a62@arm.com> Date: Tue, 06 Aug 2019 09:56:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <16866921-5116-49AE-A00E-9D738CE212BD@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2019-08/txt/msg00132.txt.bz2 On 06/08/2019 09:58, Alan Hayward wrote: > > >> On 5 Aug 2019, at 18:43, Tom Tromey wrote: >> >>>>>>> "Alan" == Alan Hayward writes: >> >> Alan> When saving registers to the stack at the start of a function, not all state >> Alan> needs to be saved. For example, only the first 64bits of float registers need >> Alan> saving. However, a program may choose to store extra state if it wishes, >> Alan> there is nothing preventing it doing so. >> >> Alan> The aarch64_analyze_prologue will error if it detects extra state being >> Alan> stored. Relex this restriction. >> >> I don't know anything about AArch64, so I can't really comment on the >> content of the patch, but I did happen to see a nit: >> >> Alan> stack.store (pv_add_constant (regs[rn], >> Alan> inst.operands[1].addr.offset.imm), >> Alan> - is64 ? 8 : 4, regs[rt]); >> Alan> + size, regs[rt]); >> >> ...this addition looked mis-indented to me. > > Thanks. > I probably missed that because the correct formatting looks horrible: > > stack.store (pv_add_constant (regs[rn], > inst.operands[1].addr.offset.imm), > size, regs[rt]); > > Instead, I can update it to the following > > stack.store ( > pv_add_constant (regs[rn], inst.operands[1].addr.offset.imm), > size, regs[rt]); > I think the coding convention in that case is to write: stack.store (pv_add_constant (regs[rn], inst.operands[1].addr.offset.imm), size, regs[rt]); R. >> >> Tom >