From: Simon Marchi <simark@simark.ca>
To: Hui Li <lihui@loongson.cn>, gdb-patches@sourceware.org
Cc: Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: Re: [PATCH] gdb: LoongArch: Add internal TLS support
Date: Mon, 13 Jul 2026 08:20:34 -0400 [thread overview]
Message-ID: <7894b01a-9ff6-4796-badb-048f45c4566e@simark.ca> (raw)
In-Reply-To: <20260713103724.7713-1-lihui@loongson.cn>
On 7/13/26 6:37 AM, Hui Li wrote:
> Implements the LoongArch-specific get_tls_dtv_addr() and uses
> svr4_tls_register_tls_methods() to register it, together with
> svr4_tls_get_thread_local_address as the get_thread_local_address
> gdbarch method, to support internal TLS address lookup.
>
> LoongArch doesn't need get_tls_dtp_offset since musl's DTP_OFFSET
> is defined as 0.
>
> This is the LoongArch version of commit c34309bea22
> ("Internal TLS support for aarch64, x86_64, riscv, ppc64, and s390x").
>
> Depends-On: bfc3ac0d13b
> ("LoongArch: Support R_LARCH_TLS_DTPREL32/64 used in debug section")
>
> Before:
>
> make check-gdb TESTS="gdb.base/tls-nothreads.exp"
> === gdb Summary ===
>
> # of expected passes 101
> # of known failures 48
>
> make check-gdb TESTS="gdb.base/tls-dlobj.exp"
> === gdb Summary ===
>
> # of expected passes 261
>
> After:
>
> make check-gdb TESTS="gdb.base/tls-nothreads.exp"
> === gdb Summary ===
>
> # of expected passes 302
>
> make check-gdb TESTS="gdb.base/tls-dlobj.exp"
> === gdb Summary ===
>
> # of expected passes 523
>
> Signed-off-by: Hui Li <lihui@loongson.cn>
Great, thanks. I compared the implementation to Aarch64, and it's very
similar, so it looks reasonable to me.
One nit below:
> @@ -1137,6 +1138,57 @@ init_loongarch_linux_record_tdep (struct gdbarch *gdbarch)
> loongarch_linux_record_tdep.arg7 = LOONGARCH_A0_REGNUM + 6;
> }
>
> +/* Fetch and return the TLS DTV (dynamic thread vector) address for PTID.
> + Throw a suitable TLS error if something goes wrong. */
> +
> +static CORE_ADDR
> +loongarch_linux_get_tls_dtv_addr (struct gdbarch *gdbarch, ptid_t ptid,
> + svr4_tls_libc libc)
> +{
> + /* On LoongArch, the thread pointer is found in TP. */
> + regcache *regcache
> + = get_thread_arch_regcache (current_inferior (), ptid, gdbarch);
> + target_fetch_registers (regcache, LOONGARCH_TP_REGNUM);
> + ULONGEST thr_ptr;
> + if (regcache->cooked_read (LOONGARCH_TP_REGNUM, &thr_ptr) != REG_VALID)
> + throw_error (TLS_GENERIC_ERROR, _("Unable to fetch thread pointer"));
> +
> + CORE_ADDR dtv_ptr_addr;
> + switch (libc)
> + {
> + case svr4_tls_libc_musl:
> + /* MUSL: The DTV pointer is found at the very end of the pthread
> + struct which is located *before* the thread pointer. I.e.
> + the thread pointer will be just beyond the end of the struct,
> + so the address of the DTV pointer is found one pointer-size
> + before the thread pointer. */
> + dtv_ptr_addr = thr_ptr - (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
> + break;
> + case svr4_tls_libc_glibc:
> + /* GLIBC: The thread pointer (TP) points just beyond the end of
> + the TCB (thread control block). On LoongArch, this struct
> + (tcbhead_t) is defined to contain two pointers. The first is
> + a pointer to the DTV and the second is a pointer to private
> + data. So the DTV pointer address is found two pointer-size
> + before thread pointer. */
> +
> + dtv_ptr_addr = thr_ptr - 2 * (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
Remove empty line above.
With, this:
Approved-By: Simon Marchi <simon.marchi@efficios.com>
Simon
next prev parent reply other threads:[~2026-07-13 12:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 10:37 Hui Li
2026-07-13 12:20 ` Simon Marchi [this message]
2026-07-18 11:35 ` Tiezhu Yang
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