From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id YD7TLlcURmOHIAoAWB0awg (envelope-from ) for ; Tue, 11 Oct 2022 21:11:51 -0400 Received: by simark.ca (Postfix, from userid 112) id BCC6F1E112; Tue, 11 Oct 2022 21:11:51 -0400 (EDT) Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=S+NcjeX7; dkim-atps=neutral X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-4.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,NICE_REPLY_A,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id F397C1E0D5 for ; Tue, 11 Oct 2022 21:11:50 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D5E6F38515D1 for ; Wed, 12 Oct 2022 01:11:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D5E6F38515D1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1665537109; bh=UVvgtFc2q2VXk8JlFfCn240af2Y83r5Gh6mKLsTZHec=; h=Date:Subject:To:References:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=S+NcjeX7pxCFPvzmsiO/xIjvcVlpYYNt0SLWwM2/Jyms0B/kpKJvo57rI8rBQ4f3H mKcerpVsyy94IDPPDMBJDH+9gm7B43Rt6Rmh2WxTtMnL35GiSGbKxhQjfdtOgLHxeh OU+VE+CLo1IWbz9QMouTHoyeNEynMpvxhQdglAWs= Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id 6693A38515C1 for ; Wed, 12 Oct 2022 01:11:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6693A38515C1 Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 29C1BJ49006524 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Oct 2022 21:11:24 -0400 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 29C1BJ49006524 Received: from [10.0.0.11] (unknown [217.28.27.60]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 8F4A31E0D5; Tue, 11 Oct 2022 21:11:19 -0400 (EDT) Message-ID: <69632804-660c-ff4b-cb60-367b1b69080d@polymtl.ca> Date: Tue, 11 Oct 2022 21:11:18 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 Subject: Re: [PATCH] gdb: fix auxv caching Content-Language: en-US To: John Baldwin , Pedro Alves , gdb-patches@sourceware.org References: <20220920122828.188190-1-luis.machado@arm.com> <20221007204440.3041413-1-simon.marchi@polymtl.ca> <6e3e1ac0-0afc-d053-b48e-a7d20549d1d7@FreeBSD.org> <9379684a-ec46-6b17-c785-c8c308cb2924@palves.net> <4fca0778-8533-6f49-f86f-8bcf53b6d45b@FreeBSD.org> In-Reply-To: <4fca0778-8533-6f49-f86f-8bcf53b6d45b@FreeBSD.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Wed, 12 Oct 2022 01:11:19 +0000 X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Simon Marchi via Gdb-patches Reply-To: Simon Marchi Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb-patches" On 2022-10-11 16:42, John Baldwin wrote: > > I think "_raw" would be better here as using the cached values should be the > default. Indeed, and the fact that target_read_auxv does caching is an implementation detail. Here's what I pushed: >From 1639fab33b5932e1a5e88e29273996f70047da85 Mon Sep 17 00:00:00 2001 From: Simon Marchi Date: Tue, 11 Oct 2022 20:53:39 -0400 Subject: [PATCH] gdb: rename target_read_auxv(target_ops *) to target_read_auxv_raw Having two overloads of target_read_auxv that don't have the same goals is confusing. Rename the one that reads from an explicit target_ops to target_read_auxv_raw. Also, it occured to me that the non-raw version could use the raw version, that reduces duplication a bit. Change-Id: I28e5f7cecbfcacd0174d4686efb3e4a23b4ad491 --- gdb/aarch64-linux-tdep.c | 2 +- gdb/arm-fbsd-tdep.c | 2 +- gdb/arm-linux-tdep.c | 2 +- gdb/auxv.c | 5 ++--- gdb/auxv.h | 2 +- gdb/ppc-linux-tdep.c | 2 +- gdb/s390-linux-tdep.c | 2 +- 7 files changed, 8 insertions(+), 9 deletions(-) diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index 476db5aa3b88..a321aee036a0 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -780,7 +780,7 @@ aarch64_linux_core_read_description (struct gdbarch *gdbarch, struct target_ops *target, bfd *abfd) { asection *tls = bfd_get_section_by_name (abfd, ".reg-aarch-tls"); - gdb::optional auxv = target_read_auxv (target); + gdb::optional auxv = target_read_auxv_raw (target); CORE_ADDR hwcap = linux_get_hwcap (auxv, target, gdbarch); CORE_ADDR hwcap2 = linux_get_hwcap2 (auxv, target, gdbarch); diff --git a/gdb/arm-fbsd-tdep.c b/gdb/arm-fbsd-tdep.c index 28fc73d694e6..4395136b83ce 100644 --- a/gdb/arm-fbsd-tdep.c +++ b/gdb/arm-fbsd-tdep.c @@ -238,7 +238,7 @@ arm_fbsd_core_read_description (struct gdbarch *gdbarch, { asection *tls = bfd_get_section_by_name (abfd, ".reg-aarch-tls"); - gdb::optional auxv = target_read_auxv (target); + gdb::optional auxv = target_read_auxv_raw (target); return arm_fbsd_read_description_auxv (auxv, target, gdbarch, tls != nullptr); } diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index 65343f6c0758..7fa8a67ae42c 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -732,7 +732,7 @@ arm_linux_core_read_description (struct gdbarch *gdbarch, struct target_ops *target, bfd *abfd) { - gdb::optional auxv = target_read_auxv (target); + gdb::optional auxv = target_read_auxv_raw (target); CORE_ADDR arm_hwcap = linux_get_hwcap (auxv, target, gdbarch); if (arm_hwcap & HWCAP_VFP) diff --git a/gdb/auxv.c b/gdb/auxv.c index 5853437b0f24..51723f9b17cb 100644 --- a/gdb/auxv.c +++ b/gdb/auxv.c @@ -363,8 +363,7 @@ target_read_auxv () if (info == nullptr) { info = auxv_inferior_data.emplace (inf); - info->data = target_read_alloc (inf->top_target (), TARGET_OBJECT_AUXV, - nullptr); + info->data = target_read_auxv_raw (inf->top_target ()); } return info->data; @@ -373,7 +372,7 @@ target_read_auxv () /* See auxv.h. */ gdb::optional -target_read_auxv (target_ops *ops) +target_read_auxv_raw (target_ops *ops) { return target_read_alloc (ops, TARGET_OBJECT_AUXV, NULL); } diff --git a/gdb/auxv.h b/gdb/auxv.h index 983e3bc9b0d9..788d187b27a0 100644 --- a/gdb/auxv.h +++ b/gdb/auxv.h @@ -52,7 +52,7 @@ extern gdb::optional target_read_auxv (); /* Read auxv data from OPS. */ -extern gdb::optional target_read_auxv (target_ops *ops); +extern gdb::optional target_read_auxv_raw (target_ops *ops); /* Search AUXV for an entry with a_type matching MATCH. diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c index 12f418fb5ac6..f7d13bac8a3e 100644 --- a/gdb/ppc-linux-tdep.c +++ b/gdb/ppc-linux-tdep.c @@ -1599,7 +1599,7 @@ ppc_linux_core_read_description (struct gdbarch *gdbarch, if (vsx) features.vsx = true; - gdb::optional auxv = target_read_auxv (target); + gdb::optional auxv = target_read_auxv_raw (target); CORE_ADDR hwcap = linux_get_hwcap (auxv, target, gdbarch); features.isa205 = ppc_linux_has_isa205 (hwcap); diff --git a/gdb/s390-linux-tdep.c b/gdb/s390-linux-tdep.c index ef2ed8510a64..14d71134e0cd 100644 --- a/gdb/s390-linux-tdep.c +++ b/gdb/s390-linux-tdep.c @@ -332,7 +332,7 @@ s390_core_read_description (struct gdbarch *gdbarch, struct target_ops *target, bfd *abfd) { asection *section = bfd_get_section_by_name (abfd, ".reg"); - gdb::optional auxv = target_read_auxv (target); + gdb::optional auxv = target_read_auxv_raw (target); CORE_ADDR hwcap = linux_get_hwcap (auxv, target, gdbarch); bool high_gprs, v1, v2, te, vx, gs; base-commit: 8652404e813a895dfebe8591b30e90328b6e6898 -- 2.38.0