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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230040)(35042699022)(1800799024)(34020700016)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jul 2024 10:45:48.9102 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8501c305-a1ee-4e6a-f8b1-08dcabcdc7d5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF00039233.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR08MB5831 X-Spam-Status: No, score=-9.8 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org On 7/24/24 10:28, Tom de Vries wrote: > On 7/24/24 08:53, Luis Machado wrote: >> On 7/24/24 06:25, Tom de Vries wrote: >>> On 7/23/24 12:02, Luis Machado wrote: >>>> On 7/17/24 16:14, Luis Machado wrote: >>>>> On 7/17/24 16:10, Tom de Vries wrote: >>>>>> On an aarch64-linux system with 32-bit userland running in a chroot, and using >>>>>> target board unix/mthumb I get: >>>>>> ... >>>>>> (gdb) hbreak hbreak.c:27^M >>>>>> Hardware assisted breakpoint 2 at 0x4004e2: file hbreak.c, line 27.^M >>>>> >>>>> That is a bit odd, but it goes through the compat layer, which is not exercised >>>>> as often as the 32-bit code. >>>>> >>>>> Let me see if I can reproduce this one on my end. >>>> >>>> I managed to reproduce this. I checked with the kernel folks and this should >>>> work, but I'm not sure where the error is coming from. >>>> >>> >>> Hi Luis, >>> >>> thanks for looking into this, and the approval, committed. >>> >>> Are you or the kernel folks following up on this, in terms of a linux kernel PR or some such?  It would be nice to add some sort of reference to the xfail. >> >> It's in my TODO. I'm still investigating to understand where the error is coming from. Once located, I plan to check with them for their thoughts and a possible >> fix. I don't think the kernel folks use the PR process much. We could probably ammend this commit later on once we have more information though. >> > > Ok, I spent some more time debugging this issue this morning. > > After reading kernel sources for a while, I tried out reversing the order in which the Breakpoint Register Pair is written in arm_linux_nat_target::low_prepare_to_resume, and ... the test-case passes. > But what would change with reversing writing to the control registers, from gdb's perspective? > My theory at this point is that the following happens in the failing case: > - PTRACE_SETHBPREGS with address 0x4004e2 > - compat_arch_ptrace > - compat_ptrace_sethbpregs > - compat_ptrace_hbp_set > - ptrace_hbp_set_addr > - ptrace_hbp_get_initialised_bp > - ptrace_hbp_create > - /* Initialise fields to sane defaults >      (i.e. values that will pass validation).  */ >   attr.bp_len = HW_BREAKPOINT_LEN_4; The default starts as a 4-byte breakpoint, but is supposed to be adjusted later on to 2 bytes. If this isn't happening, I think we have a bug somewhere. > - attr.bp_addr = 0x4004e2; > - modify_user_hw_breakpoint > - modify_user_hw_breakpoint_check > - hw_breakpoint_parse > - hw_breakpoint_arch_parse > - case is_compat_bp(bp) > - offset = 2; > - fallthrough to default > - return -EINVAL > > In short, we try to validate: > - attr.bp_len == HW_BREAKPOINT_LEN_4 && attr.bp_addr == 0x4004e2 > and fail. > > By reversing the order, we validate: > - attr.bp_len == HW_BREAKPOINT_LEN_2 && attr.bp_addr == 0, and then > - attr.bp_len == HW_BREAKPOINT_LEN_2 && attr.bp_addr == 0x4004e2 > which both succeed. Why do we have HW_BREAKPOINT_LEN_2 above while the first case has HW_BREAKPOINT_LEN_4? > > So, my questions at this point are: > - is this a problem limited to aarch64 32-bit mode, or does it also >   occur for native 32-bit arm? I'm not sure at this point. They are two separate code bases, but it is probably reasonable to assume the compat layer of aarch64 was based on the original 32-bit arm code. Checking hw_breakpoint_arch_parse for arm, it does seem fairly similar. > - is this a kernel bug? Potentially, if it is assuming a length that is not correct. > - if this is a kernel bug, is there a workaround we can use? > - if this is not a kernel bug, is this because gdb is writing the >   Breakpoint Register Pair in the wrong order? I don't think we have a specific order to write things, but if it is a bug that arises from a specific order of commands, we could potentially work around it. > > Thanks, > - Tom > >>> >>> Thanks, >>> - Tom >>> >>>>> >>>>> >>>>>> (gdb) PASS: gdb.base/hbreak.exp: hbreak >>>>>> continue^M >>>>>> Continuing.^M >>>>>> Unexpected error setting breakpoint: Invalid argument.^M >>>>>> (gdb) FAIL: gdb.base/hbreak.exp: continue to break-at-exit after hbreak >>>>>> ... >>>>>> due to this call in arm_linux_nat_target::low_prepare_to_resume: >>>>>> ... >>>>>>             if (ptrace (PTRACE_SETHBPREGS, pid, >>>>>>                 (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0) >>>>>>               perror_with_name (_("Unexpected error setting breakpoint")); >>>>>> ... >>>>>> >>>>>> This problem does not happen if instead we use a 4-byte aligned address. >>>>>> >>>>>> I'm not sure if this is simply unsupported or if there's a kernel bug of some >>>>>> sort, but I don't see what gdb can do about this. >>>>>> >>>>>> Tentatively mark this as xfail. >>>>>> >>>>>> Tested on aarch64-linux. >>>>>> --- >>>>>>    gdb/testsuite/gdb.base/hbreak.exp | 40 ++++++++++++++++++++++++++----- >>>>>>    1 file changed, 34 insertions(+), 6 deletions(-) >>>>>> >>>>>> diff --git a/gdb/testsuite/gdb.base/hbreak.exp b/gdb/testsuite/gdb.base/hbreak.exp >>>>>> index 73a3e2afb67..b140257a23e 100644 >>>>>> --- a/gdb/testsuite/gdb.base/hbreak.exp >>>>>> +++ b/gdb/testsuite/gdb.base/hbreak.exp >>>>>> @@ -27,10 +27,38 @@ if ![runto_main] { >>>>>>      set breakline [gdb_get_line_number "break-at-exit"] >>>>>>    -gdb_test "hbreak ${srcfile}:${breakline}" \ >>>>>> -     "Hardware assisted breakpoint \[0-9\]+ at 0x\[0-9a-f\]+: file .*${srcfile}, line ${breakline}\\." \ >>>>>> -     "hbreak" >>>>>> +set re_loc "file \[^\r\n\]*$srcfile, line $breakline" >>>>>> +set re_dot [string_to_regexp .] >>>>>>    -gdb_test "continue" \ >>>>>> -     "Continuing\\.\[ \r\n\]+Breakpoint \[0-9\]+, .*break-at-exit.*" \ >>>>>> -     "continue to break-at-exit after hbreak" >>>>>> +set addr 0x0 >>>>>> +gdb_test_multiple "hbreak ${srcfile}:${breakline}" "hbreak" { >>>>>> +    -re -wrap "Hardware assisted breakpoint $decimal at ($hex): $re_loc$re_dot" { >>>>>> +    set addr $expect_out(1,string) >>>>>> +    pass $gdb_test_name >>>>>> +    } >>>>>> +} >>>>>> + >>>>>> +set have_xfail 0 >>>>>> +if { [istarget arm*-*-*] } { >>>>>> +    # When running 32-bit userland on aarch64 kernel, thumb instructions that >>>>>> +    # are not 4-byte aligned may not be supported for setting a hardware >>>>>> +    # breakpoint on. >>>>>> +    set have_xfail [expr ($addr & 0x2) == 2] >>>>>> +} >>>>>> + >>>>>> +set re_xfail \ >>>>>> +    [string_to_regexp \ >>>>>> +     "Unexpected error setting breakpoint: Invalid argument."] >>>>>> + >>>>>> +gdb_test_multiple "continue" "continue to break-at-exit after hbreak" { >>>>>> +    -re -wrap "Continuing\\.\[ \r\n\]+Breakpoint \[0-9\]+, .*break-at-exit.*" { >>>>>> +    pass $gdb_test_name >>>>>> +    } >>>>>> +    -re -wrap $re_xfail { >>>>>> +    if { $have_xfail } { >>>>>> +        xfail $gdb_test_name >>>>>> +    } else { >>>>>> +        fail $gdb_test_name >>>>>> +    } >>>>>> +    } >>>>>> +} >>>>>> >>>>>> base-commit: 0ed152c5c6b3c72fc505b331ed77e08b438d643a >>>>> >>>> >>>> In any case, I agree gdb doesn't have a better way to deal with it. >>>> >>>> Approved-By: Luis Machado >>> >> >