From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 77147 invoked by alias); 9 Oct 2018 17:20:15 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 77028 invoked by uid 89); 9 Oct 2018 17:20:14 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=H*f:sk:4c4c136, Hx-spam-relays-external:209.85.128.66, H*f:sk:5019D84, H*RU:209.85.128.66 X-HELO: mail-wm1-f66.google.com Received: from mail-wm1-f66.google.com (HELO mail-wm1-f66.google.com) (209.85.128.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 09 Oct 2018 17:20:13 +0000 Received: by mail-wm1-f66.google.com with SMTP id y144-v6so2823122wmd.4 for ; Tue, 09 Oct 2018 10:20:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=subject:to:cc:references:from:openpgp:autocrypt:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding :content-language; bh=DZy4qTkQk5HXU3wKPuGA4gW/RtM9OYp3/bjKZKk/vYA=; b=Enbc0ztdIP2GjKfi5H9rjgl74JUEFiZslUCXGwv9JnzFqnHl44ykLOGIpMq5Q/YWW7 scLM/blsqxOH0S34Cm/R2nhgcQ3xdnKJuJUyyxplOvv9lBFgZDn0K0VPTgzILzWrZgyb jXVHW5Om9SCeYAPqfEhZfBFtWU5yd4CLXg/bqTJ6PeOraadheGfI/usdhgXVNuX3v5a+ cmbOvQCvVW0cj68DWcKGtCIAoFI935whqqVc/RERQ3Cp+Uj8s/zaKcFAmtYjyIOiAAOw rZAhdDQoT/8RuLeFx4g5YornDFfaVNI/PuguT1yrXLavN1gP+tkcVUT5BKXg2/MEJ9hb z1PQ== Return-Path: Received: from [192.168.43.141] ([85.255.232.109]) by smtp.gmail.com with ESMTPSA id c24-v6sm9974302wre.44.2018.10.09.10.20.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Oct 2018 10:20:10 -0700 (PDT) Subject: Re: [PATCH] RISC-V: enable have_nonsteppable_watchpoint by default To: Joel Brobecker , Pedro Alves Cc: Paul Koning , Andrew Burgess , gdb-patches@sourceware.org References: <20180917103409.GJ5952@embecosm.com> <77978648-c391-0011-6c03-c7fd38429914@embecosm.com> <20181003223703.GA22933@adacore.com> <20181008095839.GC5952@embecosm.com> <4c4c1369-0f5c-549a-ed82-51563c5e6dd6@redhat.com> <20181008142533.GA2993@adacore.com> <5019D845-3AEB-4287-A8BD-D9F96F5755B7@comcast.net> <20181008145132.GB2993@adacore.com> From: Craig Blackmore Openpgp: preference=signencrypt Message-ID: <5bd138ad-4d1d-254c-9d35-1873b2d8f5f4@embecosm.com> Date: Tue, 09 Oct 2018 17:20:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181008145132.GB2993@adacore.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-SW-Source: 2018-10/txt/msg00219.txt.bz2 On 08/10/18 15:51, Joel Brobecker wrote: >>> I think MIPS is one. The documentation is not entirely clear but >>> that's what I remember from using it. >> x86 is another. But my question is -- do we know of any RISC-V >> implementation that triggers after the write, given that the spec >> says it should trigger before the write. I don't know of any RISC-V implementations that trigger after the write. The debug spec has 'suggested breakpoint timings' but the triggers are allowed to fire at whatever point is most convenient for the implementation. I suggest that Joel's earlier patch (https://sourceware.org/ml/gdb-patches/2018-09/msg00821.html) be upstreamed so that things work for the majority of systems. We can handle implementations with other timings later, if they appear. Thanks, Craig > That was what I meant as well; I agree with Pedro that we don't > really need to do anything fancy if: > - the spec's recommendation is to trigger before the write > - and we don't know of any system that decided to go against > the recommendation. > The day we discover a system that does in fact go against the > recommendation, we can simply deal with it then and decide what > the best course of action is. >