From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22171 invoked by alias); 8 Feb 2016 17:59:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 22152 invoked by uid 89); 8 Feb 2016 17:59:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy= X-HELO: usplmg20.ericsson.net Received: from usplmg20.ericsson.net (HELO usplmg20.ericsson.net) (198.24.6.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Mon, 08 Feb 2016 17:59:29 +0000 Received: from EUSAAHC001.ericsson.se (Unknown_Domain [147.117.188.75]) by usplmg20.ericsson.net (Symantec Mail Security) with SMTP id E3.E8.06940.714D8B65; Mon, 8 Feb 2016 18:44:56 +0100 (CET) Received: from [142.133.110.95] (147.117.188.8) by smtp-am.internal.ericsson.com (147.117.188.77) with Microsoft SMTP Server id 14.3.248.2; Mon, 8 Feb 2016 12:59:26 -0500 Subject: Re: [PATCH 4/8] Implement target_emit_ops To: Yao Qi References: <1442230282-20751-1-git-send-email-pierre.langlois@arm.com> <1442580184-22562-1-git-send-email-yao.qi@linaro.org> <1442580184-22562-5-git-send-email-yao.qi@linaro.org> <56B50172.7040608@ericsson.com> <86oabrnm8k.fsf@gmail.com> CC: , Pierre Langlois From: Antoine Tremblay Message-ID: <56B8D77D.8040000@ericsson.com> Date: Mon, 08 Feb 2016 17:59:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <86oabrnm8k.fsf@gmail.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2016-02/txt/msg00197.txt.bz2 On 02/08/2016 12:30 PM, Yao Qi wrote: > Antoine Tremblay writes: > >> I'm wondering is there a reason we don't use gcc to generate the >> native bytecode like done on x86 ? >> >> x86 has a macro like so : >> >> #define EMIT_ASM(NAME, INSNS) >> do >> { >> extern unsigned char start_ ## NAME, end_ ## NAME; >> add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); >> __asm__ ("jmp end_" #NAME "\n" >> "\t" "start_" #NAME ":" >> "\t" INSNS "\n" >> "\t" "end_" #NAME ":"); >> } while (0) >> > > The reason is about the code readability. We find the way we are using > in aarch64 is more readable than the way for x86. > OK. > p += emit_stp (p, x0, x1, sp, preindex_memory_operand (-2 * 16)); > p += emit_str (p, lr, sp, offset_memory_operand (3 * 8)); > p += emit_str (p, fp, sp, offset_memory_operand (2 * 8)); > p += emit_add (p, fp, sp, immediate_operand (2 * 8)); > > vs. > > EMIT_ASM (amd64_prologue, > "pushq %rbp\n\t" > "movq %rsp,%rbp\n\t" > "sub $0x20,%rsp\n\t" > "movq %rdi,-8(%rbp)\n\t" > "movq %rsi,-16(%rbp)"); > >> Could the same be done for armv7 or there's a reason that prevents it ? >> > > No reason prevents it, but the code should be readable. > OK thanks, It is readable that way but I think I'll go with EMIT_ASM... given that this should save me quite a bit of time considering thumb/arm versions and that there's not much emit_ functions done at the moment. It should still be readable. Regards, Antoine