From: Pedro Alves <palves@redhat.com>
To: Antoine Tremblay <antoine.tremblay@ericsson.com>,
gdb-patches@sourceware.org
Subject: Re: [PATCH v5 3/7] Refactor arm_software_single_step to use regcache.
Date: Fri, 04 Dec 2015 15:10:00 -0000 [thread overview]
Message-ID: <5661ACDE.5080606@redhat.com> (raw)
In-Reply-To: <1449234783-11424-4-git-send-email-antoine.tremblay@ericsson.com>
On 12/04/2015 01:12 PM, Antoine Tremblay wrote:
> @@ -4727,7 +4754,8 @@ thumb_get_next_pc_raw (struct frame_info *frame, CORE_ADDR pc)
> {
> /* CBNZ or CBZ. */
> int imm = (bit (inst1, 9) << 6) + (bits (inst1, 3, 7) << 1);
> - ULONGEST reg = get_frame_register_unsigned (frame, bits (inst1, 0, 2));
> + ULONGEST reg;
> + regcache_raw_read_unsigned (regcache, bits (inst1, 0, 2), ®);
Missing empty line.
Note that get_frame_register_unsigned throws if the register is
unavailable, while regcache_raw_read_unsigned uses the return value as
status indication.
Shouldn't really happen normally in get_next_pcs to see an unavailable
register, but, wouldn't it be nicer to add a small wrapper like:
ULONGEST
get_regcache_raw_unsigned (struct regcache *regcache, int regnum)
{
ULONGEST value;
enum register_status status;
status = regcache_raw_read_unsigned (regcache, regnum, &value);
if (status == REG_UNAVAILABLE)
throw_error (NOT_AVAILABLE_ERROR,
_("Register %s is not available"), regnum);
return value;
}
?
Then the rest of the patch would look like:
> - ULONGEST reg = get_frame_register_unsigned (frame, bits (inst1, 0, 2));
> + ULONGEST reg = get_regcache_register_unsigned (frame, bits (inst1, 0, 2));
etc., and the reader no longer need to worry about considering why is the
return value of regcache_raw_read_unsigned ignored.
>
> if (bit (inst1, 11) && reg != 0)
> nextpc = pc_val + imm;
> @@ -4746,20 +4774,21 @@ thumb_get_next_pc_raw (struct frame_info *frame, CORE_ADDR pc)
Thanks,
Pedro Alves
next prev parent reply other threads:[~2015-12-04 15:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-04 13:13 [PATCH v5 0/6] Support software single step and conditional breakpoints on ARM in GDBServer Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 6/7] Enable software single stepping for while-stepping actions " Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 4/7] Share regcache function regcache_raw_read_unsigned Antoine Tremblay
2015-12-04 14:20 ` Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 3/7] Refactor arm_software_single_step to use regcache Antoine Tremblay
2015-12-04 15:10 ` Pedro Alves [this message]
2015-12-04 15:31 ` Antoine Tremblay
2015-12-04 15:43 ` Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 1/7] Replace breakpoint_reinsert_addr by get_next_pcs operation in GDBServer Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 7/7] Enable conditional breakpoints for targets that support software single step " Antoine Tremblay
2015-12-04 13:13 ` [PATCH v5 2/7] Share some ARM target dependent code from GDB with GDBServer Antoine Tremblay
2015-12-04 13:14 ` [PATCH v5 5/7] Support software single step on ARM in GDBServer Antoine Tremblay
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