From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 68528 invoked by alias); 15 Oct 2015 13:02:53 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 68512 invoked by uid 89); 15 Oct 2015 13:02:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 15 Oct 2015 13:02:48 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (Postfix) with ESMTPS id BFDDC3719B7; Thu, 15 Oct 2015 13:02:47 +0000 (UTC) Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t9FD2kSY006935; Thu, 15 Oct 2015 09:02:46 -0400 Message-ID: <561FA3F6.2070300@redhat.com> Date: Thu, 15 Oct 2015 13:02:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Yao Qi CC: gdb-patches@sourceware.org Subject: Re: [PATCH] aarch64 multi-arch part 6: HW breakpoint on unaligned address References: <1444731060-16237-1-git-send-email-yao.qi@linaro.org> <561CE5D2.8030505@redhat.com> <861tcy6b84.fsf@gmail.com> <561D4008.90009@redhat.com> <86fv1c4kg7.fsf@gmail.com> In-Reply-To: <86fv1c4kg7.fsf@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2015-10/txt/msg00244.txt.bz2 On 10/15/2015 09:14 AM, Yao Qi wrote: > Pedro Alves writes: >> At least the comment should be updated. It's quite misleading as is. > > In order to do 32-bit check in nat/aarch64-linux-hw-point.c, I add a new > regcache interface regcache_register_size which is defined in both GDB > and GDBserver. It has two arguments, regcache and number, which looks > more reasonable than register_size, IMO. With regcache_register_size in > place, we can check 32-bit like this, > > struct regcache *regcache > = get_thread_regcache_for_ptid (current_lwp_ptid ()); > > /* Set alignment to 2 only if the current process is 32-bit, > since thumb instruction can be 2-byte aligned. Otherwise, set > alignment to AARCH64_HBP_ALIGNMENT. */ > if (regcache_register_size (regcache, 0) == 8) > alignment = AARCH64_HBP_ALIGNMENT; > else > alignment = 2; > > on the other hand, a lot of register_size calls in GDB and GDBserver can > be replaced by regcache_register_size. This can be done separately. > > Here is the patch V2, regression tested on aarch64-linux. LGTM. Thanks, Pedro Alves