From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 122649 invoked by alias); 25 Aug 2015 12:13:53 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 122629 invoked by uid 89); 25 Aug 2015 12:13:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 25 Aug 2015 12:13:52 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id D57E6222 for ; Tue, 25 Aug 2015 12:13:50 +0000 (UTC) Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t7PCDnVQ028517; Tue, 25 Aug 2015 08:13:50 -0400 Message-ID: <55DC5BFD.3070506@redhat.com> Date: Tue, 25 Aug 2015 12:13:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Kevin Buettner , gdb-patches@sourceware.org Subject: Re: [PATCH 2/8] Add new gdbarch method, unconditional_branch_address References: <20150818235334.1afb0c85@pinnacle.lan> <20150819000002.06f6a2cf@pinnacle.lan> In-Reply-To: <20150819000002.06f6a2cf@pinnacle.lan> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-SW-Source: 2015-08/txt/msg00721.txt.bz2 On 08/19/2015 08:00 AM, Kevin Buettner wrote: > +# Examine instruction at PC. If instruction at PC is an unconditional > +# branch, return the address to which control is transferred when the > +# branch is taken. Return 0 when this method is not implemented by > +# architecture, PC refers to an invalid address, or instruction at PC > +# is not an unconditional branch. > +m:CORE_ADDR:unconditional_branch_address:CORE_ADDR pc:pc::default_unconditional_branch_address::0 > + In addition to the comments in the other patch, I wonder if we would better name this in terms of a higher level concept, around "breakpoint address" instead of a "low level branch destination"? Thanks, Pedro Alves