From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 108021 invoked by alias); 4 Aug 2015 10:11:45 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 108011 invoked by uid 89); 4 Aug 2015 10:11:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=no version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 04 Aug 2015 10:11:44 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 1A0CD3C224; Tue, 4 Aug 2015 10:11:43 +0000 (UTC) Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t74ABfIR030768; Tue, 4 Aug 2015 06:11:42 -0400 Message-ID: <55C08FDD.30703@redhat.com> Date: Tue, 04 Aug 2015 10:11:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Yao Qi CC: gdb-patches@sourceware.org Subject: Re: [PATCH 2/7] New regs_info for aarch32 References: <1438355801-25798-1-git-send-email-yao.qi@linaro.org> <1438355801-25798-3-git-send-email-yao.qi@linaro.org> <55BF7383.5030304@redhat.com> <55BF980F.5010306@gmail.com> <55BFA0AD.5000408@redhat.com> <86614ve5z5.fsf@gmail.com> In-Reply-To: <86614ve5z5.fsf@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2015-08/txt/msg00066.txt.bz2 On 08/04/2015 10:51 AM, Yao Qi wrote: > Pedro Alves writes: > >> Let me try putting it another way then. >> >> Why are some init_registers_arm_XXX calls done in >> linux-aarch32-low.c:initialize_low_arch_aarch32 but others >> in linux-arm-low.c:initialize_low_arch? >> >> If we already end up with __aarch64__ #ifdefs, shouldn't the resulting >> code end like this? >> >> void >> initialize_low_arch_aarch32 (void) >> { >> #ifndef __aarch64__ >> init_registers_arm (); >> init_registers_arm_with_iwmmxt (); >> init_registers_arm_with_vfpv2 (); >> init_registers_arm_with_vfpv3 (); >> #endif >> init_registers_arm_with_neon (); >> } >> >> Isn't aarch32 the term used for all 32-bit execution state, >> including pre-ARMv8? Otherwise, going forward, what is the >> guideline to know where to put a new >> init_registers_arm_xxx call? > > aarch32 means armv7+neon, Ah. > so ideally we only need call > init_registers_arm_with_neon for aarch32. However, arm_store_vfpregset > and arm_fill_vfpregset need to check tdesc_arm_with_vfpv3 and > tdesc_arm_with_vfpv2, so we need to call init_registers_arm_with_vfpv2 > and init_registers_arm_with_vfpv3 to init them. That is the reason I > call them inside initialize_low_arch_aarch32. > > I agree the "#ifndef __aarch64__" is confusing, and let me remove that > block out of initialize_low_arch_aarch32. The patch below is updated to > initialize arm_with_neon target description in > linux-aarch32-low.c:initialize_low_arch_aarch32, and leave vfpv2 and > vfpv3 target descriptions inside linux-arm-low.c. This is cleaner than > the previous version. As a result, patch 3/7 is cleaner too, because > "#ifndef __aarch64__" is not needed anymore. > Nice. > The guideline of adding new arm targets in my mind is if new arm target > can be run on aarch32 (32-bit mode on aarch64), it should be initialized > in initialize_low_arch_aarch32. If new arm target can't be run on > 32-bit mode on aarch64, it should be initialized in > linux-arm-low.c:initialize_low_arch. > OK, that makes sense. This version looks good to me. Thanks! -- Pedro Alves