From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4072 invoked by alias); 16 Jul 2015 09:09:22 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 4055 invoked by uid 89); 16 Jul 2015 09:09:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 16 Jul 2015 09:09:19 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-4-x4hOnFDSQvCVkv0BJ9T6gw-1; Thu, 16 Jul 2015 10:09:14 +0100 Received: from [10.2.207.36] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 16 Jul 2015 10:09:13 +0100 Message-ID: <55A774BA.1010708@arm.com> Date: Thu, 16 Jul 2015 09:09:00 -0000 From: Pierre Langlois User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Yao Qi CC: pierre.langlois@arm.com, "gdb-patches@sourceware.org" Subject: Re: [PATCH] [AArch64] Mark single precision pseudo registers unavailable if invalid References: <1436957554-1403-1-git-send-email-pierre.langlois@arm.com> <86mvyxjzah.fsf@gmail.com> <55A670FF.7010805@gmail.com> In-Reply-To: <55A670FF.7010805@gmail.com> X-MC-Unique: x4hOnFDSQvCVkv0BJ9T6gw-1 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-07/txt/msg00469.txt.bz2 On 15/07/15 15:41, Yao Qi wrote: > On 15/07/15 15:00, Yao Qi wrote: >> ... when I read your patch, I am wondering why does aarch64 implement >> gdbarch method pseudo_register_read_value rather than >> pseudo_register_read. If we implement the pseudo_register_read, the >> caller will mark the value unavailable according to its return value. >> pseudo_register_read_value was added to handle partially available >> registers byhttps://sourceware.org/ml/gdb-patches/2011-07/msg00351.html >> but I don't think of a case that some aarch64 register is partially >> available. Maybe, another fix to this problem is to implement >> pseudo_register_read instead of pseudo_register_read_value. Yes, it makes sense to me. I don't think we should have partially available V registers in any cases. For example, reading the S0 register just ignores the top-level bits of the Q0 register, but they are still available to read through Q0. And writing to S0 will clear the top-level bits of Q0. As it is implemented in aarch64_pseudo_write. >=20 > To be clear, your patch can be pushed in, as it is correct and fixes > fails in tests. We can discuss and implement pseudo_register_read > rather than pseudo_register_read_value for aarch64 later in the > follow-up patch. >=20 OK, I'll push it in and make sure pseudo_register_read works as expected in a follow-up patch. Thanks, Pierre