From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 63474 invoked by alias); 8 May 2015 11:02:49 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 63464 invoked by uid 89); 8 May 2015 11:02:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 08 May 2015 11:02:47 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 00ADD8E78A; Fri, 8 May 2015 11:02:45 +0000 (UTC) Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t48B2iB1004239; Fri, 8 May 2015 07:02:45 -0400 Message-ID: <554C97D3.3090606@redhat.com> Date: Fri, 08 May 2015 11:02:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Yao Qi CC: gdb-patches@sourceware.org Subject: Re: [PATCH] [gdbserver] Disable conditional breakpoints on no-hardware-single-step targets References: <1430411029-12097-1-git-send-email-qiyaoltc@gmail.com> <554A368F.4060309@redhat.com> <86oalwvf38.fsf@gmail.com> In-Reply-To: <86oalwvf38.fsf@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2015-05/txt/msg00182.txt.bz2 On 05/07/2015 11:47 AM, Yao Qi wrote: > Pedro Alves writes: > >> Of a random PC address no, but in gdbserver's case, I think that it >> would work, because we need it to step over a breakpoint that is >> at the current PC. So we could: >> >> #1 - Get the mode of the current PC from the thread's $cpsr register. >> >> #2 - Get the mode of the next PC by looking at the instruction that is >> about to be executed (at current PC). If bx and blx, which change >> modes, check the thumb bit of the destination address. >> For all other instructions, same mode as the current PC. >> > > We can know the mode of the next PC in this way, but we don't know the > address of the next PC. In fact, we need to know the address of the > next PC first, and then determine the mode of the next PC. Probably, we > need something as below, Yes, certainly. I was just replying to this part: > When GDBserver steps over a breakpoint in arm mode function, which > returns to thumb mode, GDBserver will insert arm mode breakpoint by > mistake and the program will crash. GDBserver alone is unable to > determine the arm/thumb mode given a PC address. See how GDB does > it in arm-tdep.c:arm_pc_is_thumb. > 1. Teach GDBserver to compute the address of the next PC, > 2. Determine the mode of the next PC as you suggested, > 3. Add breakpoint_from_pc hook in target_ops, so that the right > breakpoint instruction can be selected. Not sure about #3. We'd need some target method to get the breakpoint opcode, like breakpoint_from_pc, but this wouldn't handle random addresses. I think we can instead use the size parameter passed to the_target->insert_point already. That parameter already has per-arch meaning for breakpoint packets: 2=Thumb, 3=Thumb2, 4=ARM. So we'd more likely end up with a breakpoint_from_size or something. >> TBC, it's not that the feature is GNU/Linux specific (like something >> related to system calls or some detail in glibc), but that the support >> for conditional breakpoints is baked into linux-low.c instead of >> in generic code. > > How about writing comments like this? > > /* Although win32-i386 has hardware single step, still disable this > feature for win32, because it is implemented in linux-low.c instead > of in generic code. */ Fine with me. Thanks, Pedro Alves