From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 43258 invoked by alias); 7 May 2015 11:45:28 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 43242 invoked by uid 89); 7 May 2015 11:45:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.0 required=5.0 tests=AWL,BAYES_00,SPF_PASS,TBC autolearn=no version=3.3.2 X-HELO: usevmg21.ericsson.net Received: from usevmg21.ericsson.net (HELO usevmg21.ericsson.net) (198.24.6.65) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Thu, 07 May 2015 11:45:26 +0000 Received: from EUSAAHC008.ericsson.se (Unknown_Domain [147.117.188.96]) by usevmg21.ericsson.net (Symantec Mail Security) with SMTP id CF.4A.06409.F2CEA455; Thu, 7 May 2015 06:38:07 +0200 (CEST) Received: from [142.133.110.95] (147.117.188.8) by smtp-am.internal.ericsson.com (147.117.188.98) with Microsoft SMTP Server id 14.3.210.2; Thu, 7 May 2015 07:45:23 -0400 Message-ID: <554B5052.2090904@ericsson.com> Date: Thu, 07 May 2015 11:45:00 -0000 From: Antoine Tremblay User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Yao Qi , Pedro Alves CC: Subject: Re: [PATCH] [gdbserver] Disable conditional breakpoints on no-hardware-single-step targets References: <1430411029-12097-1-git-send-email-qiyaoltc@gmail.com> <554A368F.4060309@redhat.com> <86oalwvf38.fsf@gmail.com> In-Reply-To: <86oalwvf38.fsf@gmail.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2015-05/txt/msg00140.txt.bz2 On 05/07/2015 06:47 AM, Yao Qi wrote: > Pedro Alves writes: > >> Of a random PC address no, but in gdbserver's case, I think that it >> would work, because we need it to step over a breakpoint that is >> at the current PC. So we could: >> >> #1 - Get the mode of the current PC from the thread's $cpsr register. >> >> #2 - Get the mode of the next PC by looking at the instruction that is >> about to be executed (at current PC). If bx and blx, which change >> modes, check the thumb bit of the destination address. >> For all other instructions, same mode as the current PC. >> > > We can know the mode of the next PC in this way, but we don't know the > address of the next PC. In fact, we need to know the address of the > next PC first, and then determine the mode of the next PC. Probably, we > need something as below, > > 1. Teach GDBserver to compute the address of the next PC, > 2. Determine the mode of the next PC as you suggested, > 3. Add breakpoint_from_pc hook in target_ops, so that the right > breakpoint instruction can be selected. > Just fyi, I'm working on doing this at the moment, my investigation is still incomplete... So far I mainly plan to port the arm_get_next code to gdbserver, to accomplish 1. , the code doesn't have so many deps so it should be ok 2. by looking at $cpsr 3. should be fine as 1 and 2 are done... I don't know however yet the best strategy to share the code but I'm guessing I could make the parts that don't have any deps to gdbarch etc in a shared function with gdb/gdbserver... Any pointers on this are welcome... >>> >>> After thinking about how to teach GDBserver inserting right breakpoint >>> (arm or thumb) for a while, I reconsider it from a different direction >>> that it may be unreasonable to run target-side conditional breakpoint for >>> targets without hardware single step. Pedro also pointed this out here >>> https://sourceware.org/ml/gdb-patches/2015-04/msg00337.html >> >> In the end I was somewhat convinced that things ended up working. >> But I certainly don't object to this patch. >> >>> + /* Although win32-i386 has hardware single step, still disable this >>> + feature for win32, because it is quite GNU/Linux specific. */ >>> + NULL, /* supports_conditional_breakpoints */ >> >> TBC, it's not that the feature is GNU/Linux specific (like something >> related to system calls or some detail in glibc), but that the support >> for conditional breakpoints is baked into linux-low.c instead of >> in generic code. > > How about writing comments like this? > > /* Although win32-i386 has hardware single step, still disable this > feature for win32, because it is implemented in linux-low.c instead > of in generic code. */ >