Re: [PATCH 04/23] sim/erc32: Add FPU support on x86_64 hosts.

[Jiri Gaisler <jiri@gaisler.se>]

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On 02/22/2015 05:40 AM, Mike Frysinger wrote:
> On 19 Feb 2015 21:45, Jiri Gaisler wrote:
>> On 02/17/2015 10:05 AM, Mike Frysinger wrote:
>>> On 17 Feb 2015 08:44, Jiri Gaisler wrote:
>>>> 	* float.c (get_accex) access FPU control and status words on x64
>>>
>>> shouldn't you gut this file and use <fenv.h> instead for a portable method ?
>>> http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/fenv.h.html
>>>
>>> at the very least, you could cut over to <fpu_control.h> ...
>>
>> I will switch to fenv.h, but this will produce less accurate results
>> on Intel hardware. double on SPARC V8 has 53-bit mantissa while Intel has
>> both 53- and 64-bit, and 64-bit is default. To get accurate SPARC V8 FPU
>> operations, the Intel FPU should be switched to 53-bit, but the fenv.h
>> does not have an API for this. I guess we will have to live with that ...
> 
> if you wanted to keep a little inline asm to just that particular bit twiddle, 
> that should be fine.

Can't be bothered, I like the idea of dropping the assembly fully.

> 
> normally the sims are functional ... but i guess this part of the simulator is 
> relying on the inaccuracies of floating point to trade for speed ?
> -mike

Yes, instead of emulating the FPU (soft-float libs) we use the host FPU directly.
Works fine when the host is standard IEEE-754 compatible, but can lead to minor
discrepancies when the host has extended precision (like Intel/AMD). If somebody
really cares, he can run sis on a non-x86 box (SPARC, ARM or PowerPC).

Jiri.



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