--- /Volumes/Storage/Users/kdienes/source/cygnus.cygnus/src/gdb/testsuite/gdb.arch/altivec-regs.exp	Tue Nov  5 02:38:07 2002
+++ altivec-regs.exp	Tue Nov  5 03:43:51 2002
@@ -32,7 +32,13 @@
 set prms_id 0
 set bug_id 0
 
-if ![istarget "powerpc-*"] then {
+if [istarget "powerpc-apple-*"] {
+    set vrbase "v"
+    set compile_flags { debug additional_flags=-w additional_flags=-faltivec }
+} elseif [istarget "powerpc-*"] {
+    set vrbase "vr"
+    set compile_flags { debug additional_flags=-w }
+} else {
     verbose "Skipping altivec register tests."
     return
 }
@@ -41,7 +47,7 @@
 set binfile ${objdir}/${subdir}/${testfile}
 set src1 ${srcdir}/${subdir}/${testfile}.c
 
-if  { [gdb_compile ${src1} ${binfile} executable {debug additional_flags=-w}] != "" } {
+if  { [gdb_compile ${src1} ${binfile} executable ${compile_flags}] != "" } {
      gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail."
 }
 
@@ -60,7 +66,7 @@
 # set all the registers integer portions to 1
 for {set i 0} {$i < 32} {incr i 1} {
         for {set j 0} {$j < 4} {incr j 1} {
-           gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]"
+           gdb_test "set \$$vrbase$i.v4_int32\[$j\] = 1" "" "set reg $vrbase$i.v4si.f\[$j\]"
         }
 }
 
@@ -88,17 +94,17 @@
 # b) the register read (below) also works.
 
 if {$endianness == "big"} {
-set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
+    set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = ..00*.00*.00*.001.00*.00*.00*.001.00*.00*.00*.001.00*.00*.00*.001.."
 } else {
-set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
+    set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = ..001.00*.00*.00*.001.00*.00*.00*.001.00*.00*.00*.001.00*.00*.."
 }
 
 for {set i 0} {$i < 32} {incr i 1} {
-        gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
+        gdb_test "info reg $vrbase$i" "$vrbase$i.*$decimal_vector\t\\(raw 0x00000001000000010000000100000001\\)" "info reg $vrbase$i"
 }
 
-gdb_test "info reg vrsave" "vrsave.*0x1" "info reg vrsave"
-gdb_test "info reg vscr" "vscr.*0x1" "info reg vscr"
+gdb_test "info reg vrsave" "vrsave.*0x1\t1" "info reg vrsave"
+gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr"
 
 # Now redo the same tests, but using the print command.
 # Note: in LE case, the char array is printed WITHOUT the last character.
@@ -107,25 +113,29 @@
 # the way gdb works.
 
 if {$endianness == "big"} {
-     set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = ..0.0.0.001.0.0.0.001.0.0.0.001.0.0.0.001.."
+    set hex_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
 } else {
-     set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = ..001.0.0.0.001.0.0.0.001.0.0.0.001.0.0.."
+    set hex_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
+}
+
+for {set i 0} {$i < 32} {incr i 1} {
+        gdb_test "print \$$vrbase$i" ".* = $decimal_vector" "print $vrbase$i (natural) $r3067302"
 }
 
 for {set i 0} {$i < 32} {incr i 1} {
-        gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
+        gdb_test "print /x \$$vrbase$i" ".* = $hex_vector" "print $vrbase$i (hex) $r3067302"
 }
 
 gdb_test "print \$vrsave" ".* = 1" "print vrsave"
 gdb_test "print \$vscr" ".* = 1" "print vscr"
 
 for {set i 0} {$i < 32} {incr i 1} {
-         set pattern$i ".*vr$i.*"
-         append pattern$i $vector_register
+         set pattern$i ".*$vrbase$i.*"
+         append pattern$i $decimal_vector
 }
 
-send_gdb "info powerpc altivec\n"
-gdb_expect_list "info powerpc altivec" ".*$gdb_prompt $" {
+send_gdb "info vector\n"
+gdb_expect_list "info vector" ".*$gdb_prompt $" {
 [$pattern0]
 [$pattern1]
 [$pattern2]
@@ -158,8 +168,8 @@
 [$pattern29]
 [$pattern30]
 [$pattern31]
-"\[ \t\n\r\]+vscr\[ \t\]+0x1"
-"\[ \t\n\r\]+vrsave\[ \t\]+0x1"
+"\[ \t\n\r\]+vscr\[ \t\]+0x1\t1"
+"\[ \t\n\r\]+vrsave\[ \t\]+0x1\t1"
 }
 
 gdb_test "break vector_fun" \