From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24423 invoked by alias); 16 Oct 2014 22:07:43 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 24413 invoked by uid 89); 16 Oct 2014 22:07:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,LIKELY_SPAM_BODY,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-wi0-f177.google.com Received: from mail-wi0-f177.google.com (HELO mail-wi0-f177.google.com) (209.85.212.177) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 16 Oct 2014 22:07:41 +0000 Received: by mail-wi0-f177.google.com with SMTP id fb4so607484wid.10 for ; Thu, 16 Oct 2014 15:07:38 -0700 (PDT) X-Received: by 10.180.39.145 with SMTP id p17mr24005809wik.32.1413497258370; Thu, 16 Oct 2014 15:07:38 -0700 (PDT) Received: from [192.168.0.102] (bl16-27-19.dsl.telepac.pt. [188.81.27.19]) by mx.google.com with ESMTPSA id u7sm3452249wif.7.2014.10.16.15.07.36 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Oct 2014 15:07:37 -0700 (PDT) Message-ID: <544041A7.50802@gmail.com> Date: Thu, 16 Oct 2014 22:07:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.1 MIME-Version: 1.0 To: "Jose E. Marchesi" , gdb-patches@sourceware.org Subject: Re: [PATCH V2 6/9] Support for DTrace USDT probes in x86_64 targets. References: <1412961772-16249-1-git-send-email-jose.marchesi@oracle.com> <1412961772-16249-7-git-send-email-jose.marchesi@oracle.com> In-Reply-To: <1412961772-16249-7-git-send-email-jose.marchesi@oracle.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2014-10/txt/msg00442.txt.bz2 > +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr) > +{ > + gdb_byte buf[5]; > + read_memory (addr - 3, buf, 5); > + > + /* The instruction sequence used in x86_64 machines for a disabled > + is-enabled probe is: > + > + xor %rax, %rax => 48 33 C0 > + ADDR: nop => 90 > + nop => 90 > + Please use read_code when reading code, so that these reads go through the code cache. > + /* We use the following instruction sequence for disabling an > + is-enabled probe: > + > + xor %rax, %rax; nop; nop => 48 33 C0 90 90 > + > + Note that ADDR is offset 3 bytes from the beginning of the > + sequence. */ > + > + gdb_byte buf[5]; > + > + buf[0] = 0x48; > + buf[1] = 0x33; > + buf[2] = 0xc0; > + buf[3] = 0x90; > + buf[4] = 0x90; > + > + write_memory (addr - 3, buf, 5); These code sequences are duplicated in lots of places. Writing like this instead is both shorter and less error prone: const gdb_byte buf[] = { 0x48, 0x33, 0xc0, 0x90, 0x90 }; write_memory (addr - 3, buf, sizeof (buf)); ... and IMO eliminates the need to have the sequence duplicated in the comment above. Going further, we can make these sequences be globals, like: /* The instruction sequences used in x86_64 machines for a disabled is-enabled probe. */ const gdb_byte amd64_dtrace_disabled_probe_sequence_1[] = { /* xor %rax, %rax */ 0x48, 0x33, 0xc0, /* ADDR: nop */ 0x90, /* nop */ 0x90 }; const gdb_byte amd64_dtrace_disabled_probe_sequence_2[] = { /* xor %rax, %rax */ 0x48, 0x33, 0xc0, /* ADDR: ret */ 0xc3, /* nop */ 0x90 }; etc. And then instead of: > +amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr) > +{ > + gdb_byte buf[5]; > + read_memory (addr - 3, buf, 5); > + > + /* The instruction sequence used in x86_64 machines for a disabled > + is-enabled probe is: > + > + xor %rax, %rax => 48 33 C0 > + ADDR: nop => 90 > + nop => 90 > + > + or > + > + xor %rax, %rax => 48 33 C0 > + ADDR: ret => c3 > + nop => 90 > + > + This function returns 1 if the instructions at ADDR do _not_ > + follow any of these patterns. > + > + Note that ADDR is offset 3 bytes from the beginning of these > + sequences. */ > + > + return !((buf[0] == 0x48) && (buf[1] == 0x33) && (buf[2] == 0xc0) /* xor */ > + && ((buf[3] == 0x90) || (buf[3] == 0xc3)) /* nop | ret */ > + && (buf[4] == 0x90)); /* nop */ > +} Simply write: amd64_dtrace_probe_is_enabled (struct gdbarch *gdbarch, CORE_ADDR addr) { gdb_byte buf[5]; read_code (addr - 3, buf, 5); return (memcmp (buf, amd64_dtrace_disabled_probe_sequence_1) != 0 && memcmp (buf, amd64_dtrace_disabled_probe_sequence_2) != 0) } ... etc. Let the compiler worry about optimizing those memcmps if necessary. > + static int arg_reg_map[6] = write: static const int arg_reg_map[] = > + { > + AMD64_RDI_REGNUM, /* Arg 1. */ > + AMD64_RSI_REGNUM, /* Arg 2. */ > + AMD64_RDX_REGNUM, /* Arg 3. */ > + AMD64_RCX_REGNUM, /* Arg 4. */ > + AMD64_R8_REGNUM, /* Arg 5. */ > + AMD64_R9_REGNUM /* Arg 6. */ > + }; + + /* DTrace probe arguments can be found on the ABI-defined places for + regular arguments at the current PC. The probe abstraction + currently supports up to 12 arguments for probes. */ + + if (narg < 6) + { I'd suggest putting the arg_reg_map array within this if block. Thanks, Pedro Alves