From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11585 invoked by alias); 16 Sep 2014 15:21:36 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 11571 invoked by uid 89); 16 Sep 2014 15:21:34 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 16 Sep 2014 15:21:33 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s8GFLMQO016252 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 16 Sep 2014 11:21:22 -0400 Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s8GFLIsa020215; Tue, 16 Sep 2014 11:21:19 -0400 Message-ID: <5418556E.7010502@redhat.com> Date: Tue, 16 Sep 2014 15:21:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.0 MIME-Version: 1.0 To: Terry Guo , Marcus Shawcroft CC: lgustavo@codesourcery.com, Joel Brobecker , Yao Qi , gdb-patches@sourceware.org Subject: Re: [RFA/commit] arm-tdep.c: Do not single-step after hitting a watchpoint. References: <1410786062-19274-1-git-send-email-brobecker@adacore.com> <87bnqf2578.fsf@codesourcery.com> <20140916115936.GM4871@adacore.com> <5418279A.1040604@codesourcery.com> <20140916124814.GO4871@adacore.com> <54183681.3010504@codesourcery.com> In-Reply-To: <54183681.3010504@codesourcery.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit X-SW-Source: 2014-09/txt/msg00541.txt.bz2 Hi Terry, Marcus, Can someone at ARM shed some light on this, please? This thread is here: https://sourceware.org/ml/gdb-patches/2014-09/msg00498.html And the discussion started in another thread here: https://sourceware.org/ml/gdb/2014-09/msg00000.html I've just added a test that hopefully helps with this, btw: https://sourceware.org/ml/gdb-patches/2014-09/msg00535.html I'm also wondering whether Aarch64 needs adjustment as well. Thanks, Pedro Alves On 09/16/2014 02:09 PM, Luis Machado wrote: > On 09/16/2014 09:48 AM, Joel Brobecker wrote: >>>> I think the experiments that were run showed that QEMU is in fact >>>> correct and should NOT be changed. >>> >>> Do we know what the Linux kernel's behavior on this one is? I wonder >>> what the stopped data address shows. >>> >>> Someone with access to a board with a relatively new kernel could >>> try that and rule it out, otherwise we risk fixing something for >>> QEMU/bare metal and breaking things for Linux. >> >> When I tested on GNU/Linux, watchpoints simply did not work >> (silently ignored, no signal). I was using an old kernel (2012), >> though; but that's all I had access to. But, all in all, baremetal >> should be our most reliable source of info, though,no? - no software >> layer to murky the waters. >> > > It is hard to tell. ARM's documentation is not clear. For example, this > is probably where the stopped data address should be coming from: > > -- > > WFAR - Watchpoint Fault Address Register > > The WFAR is updated to indicate the address of the instruction that > accessed the watchpointed address: > > - the address of the instruction + 8 in ARM state > - the address of the instruction + 4 in Thumb® state > > -- > > So it seems in line with what we are seeing? The program being trapped > two instructions after the data fault? > > If it stops just a single instruction after the data fault, then someone > (probe, emulator or kernel) may be trying to help GDB by decrementing > the data fault address. > > Luis >