From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19045 invoked by alias); 9 Jun 2014 17:57:44 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 19035 invoked by uid 89); 9 Jun 2014 17:57:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 09 Jun 2014 17:57:42 +0000 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s59HvWVm008996 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 9 Jun 2014 13:57:33 -0400 Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s59HvSFI014071; Mon, 9 Jun 2014 13:57:29 -0400 Message-ID: <5395F588.40308@redhat.com> Date: Mon, 09 Jun 2014 17:57:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Ajit Kumar Agarwal , Michael Eager , "gdb-patches@sourceware.org" , Yao Qi CC: Joel Brobecker , Vinod Kathail , Vidhumouli Hunsigida , Nagaraju Mekala Subject: Re: [Patch, microblaze]: Add slr and shr regs References: <537EFA08.1060309@eagercon.com> <537FCEDA.9030504@eagercon.com> <2e5c185d-329c-46cf-930c-8cc2288891aa@BN1BFFO11FD019.protection.gbl> <538431FB.2070904@eagercon.com> <865132b2-a593-4147-a7c6-cee25c1ed0fd@BN1AFFO11FD052.protection.gbl> <53845299.5080601@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2014-06/txt/msg00397.txt.bz2 On 06/09/2014 06:26 PM, Ajit Kumar Agarwal wrote: > The slr(stack low register) and shr(stack high registers) are implemented based > on C_USE_STACK_PROTECTION is set 0/1. Microblaze being the reconfigurable architecture > the design can be selected with and without these registers. Its hard to identify in gdb > whether these registers is being implemented for the design or not. In XMD where the gdb > client connects to the local host we always display the shr and shl registers irrespective > of C_USE_STACK_PROTECTION is set or not. In the case where the design is not > implemented with these register we always display the content to be 0 or ? to the user. > gdb will also display these registers when the C_USE_STACK_PROTECTION is set 0/1. This is exactly what target descriptions are supposed to solve. With those, you can have the target tell GDB about any random register, and GDB will know about it, without having to change GDB. If the register in question are an important group that GDB needs to be aware of them (seems to be the case here), then target descriptions have this concept of "target features" to address it. Grep for tdesc_find_feature in the source tree for numerous examples, and see the "Target Description" and "Standard Target Features" in the manual. -- Pedro Alves