From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 903 invoked by alias); 21 May 2014 14:06:10 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 887 invoked by uid 89); 21 May 2014 14:06:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 21 May 2014 14:05:45 +0000 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s4LE5LXk027050 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 21 May 2014 10:05:22 -0400 Received: from [127.0.0.1] (ovpn01.gateway.prod.ext.ams2.redhat.com [10.39.146.11]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id s4LE5IXw011309; Wed, 21 May 2014 10:05:19 -0400 Message-ID: <537CB29E.6060909@redhat.com> Date: Wed, 21 May 2014 14:06:00 -0000 From: Pedro Alves User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Ajit Kumar Agarwal , Michael Eager , Michael Eager , "gdb-patches@sourceware.org" , Joel Brobecker CC: Vinod Kathail , Vidhumouli Hunsigida , Nagaraju Mekala Subject: Re: [Patch, microblaze]: Add slr and shr regs and little-endian breakpoint References: <537BC5B9.10601@eagercon.com> <537C5A25.9000003@eagerm.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2014-05/txt/msg00481.txt.bz2 On 05/21/2014 02:40 PM, Ajit Kumar Agarwal wrote: > Based on the feedback I have splitted the patch and the following is the patch for Add slr and shr regs support. > > [Patch, microblaze]: Add slr and shr regs > > ChangeLog: > 2014-05-20 Ajit Agarwal > > * gdb/gdbserver/Makefile.in (microblaze-linux.c): New rule. > > * gdb/microblaze-tdep.c (microblaze_register_names): Added > the rshr and rslr register names. > > * gdb/microblaze-tdep.h (microblaze_reg_num): Addition of > field MICROBLAZE_SLR_REGNUM and MICROBLAZE_SHR_REGNUM. > (microblaze_frame_cache): Change in the index of > register_offsets. > > * gdb/regformats/reg-microblaze.dat: New Register data file. > > Signed-off-by:Ajit Agarwal ajitkum@xilinx.com > > Thanks & Regards > ChangeLog: > 2014-05-20 Ajit Agarwal > > * gdb/gdbserver/Makefile.in (microblaze-linux.c): New rule. gdb and gdbserver each have their own ChangeLog files. Filenames in entries should be relative to the corresponding ChangeLog file. So: * Makefile.in (microblaze-linux.c): New rule. But looks like microblaze-linux.c is missing from the patch? > > * gdb/microblaze-tdep.c (microblaze_register_names): Added > the rshr and rslr register names. And: * microblaze-tdep.c (microblaze_register_names): Added the rshr and rslr register names. But use present tense "Add". > > * gdb/microblaze-tdep.h (microblaze_reg_num): Addition of > field MICROBLAZE_SLR_REGNUM and MICROBLAZE_SHR_REGNUM. * microblaze-tdep.h (microblaze_reg_num): Add MICROBLAZE_SLR_REGNUM and MICROBLAZE_SHR_REGNUM. > (microblaze_frame_cache): Change in the index of > register_offsets. What change? > > * gdb/regformats/reg-microblaze.dat: New Register data file. What for upper/lower case mixups. "New file." is sufficient though: * regformats/reg-microblaze.dat: New file. > /* Offsets to saved registers. */ > - int register_offsets[57]; /* Must match MICROBLAZE_NUM_REGS. */ > + int register_offsets[59]; /* Must match MICROBLAZE_NUM_REGS. */ How about we let the compiler worry about this? Define MICROBLAZE_NUM_REGS like: enum microblaze_regnum ... MICROBLAZE_RTLBX_REGNUM, MICROBLAZE_RTLBSX_REGNUM, MICROBLAZE_RTLBLO_REGNUM, MICROBLAZE_RTLBHI_REGNUM MICROBLAZE_RTLBHI_REGNUM, MICROBLAZE_SLR_REGNUM, MICROBLAZE_SHR_REGNUM + + MICROBLAZE_NUM_REGS And then you can write: int register_offsets[MICROBLAZE_NUM_REGS]; But, most importantly, I've no clue what these slr and shr registers are, but, do all microblaze cpus have those? -- Pedro Alves