From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11145 invoked by alias); 25 Nov 2013 14:51:55 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 11127 invoked by uid 89); 25 Nov 2013 14:51:54 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.9 required=5.0 tests=AWL,BAYES_50,RDNS_NONE,SPF_PASS,T_FRT_BELOW2,URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mga11.intel.com Received: from Unknown (HELO mga11.intel.com) (192.55.52.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 25 Nov 2013 14:51:53 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 25 Nov 2013 06:51:46 -0800 X-ExtLoop1: 1 Received: from wtedesch-mobl2.ger.corp.intel.com (HELO [172.28.205.50]) ([172.28.205.50]) by fmsmga002.fm.intel.com with ESMTP; 25 Nov 2013 06:51:44 -0800 Message-ID: <529363FF.3060602@intel.com> Date: Mon, 25 Nov 2013 15:01:00 -0000 From: Walfred Tedeschi User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: Walfred Tedeschi , palves@redhat.com, yao@codesourcery.com CC: gdb-patches@sourceware.org Subject: Re: [PATCH v1 1/1] Fix PR16193 - gdbserver aborts. References: <1385386802-16948-1-git-send-email-walfred.tedeschi@intel.com> In-Reply-To: <1385386802-16948-1-git-send-email-walfred.tedeschi@intel.com> Content-Type: text/plain; charset="iso-8859-15"; format="flowed" Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2013-11/txt/msg00775.txt.bz2 Hello All, For clarification the macro I386_XSTATE_SIZE(XCR0) was returning for any=20 XCR0 the value 576. However when reading the registers we used more than this buffer size=20 (when on AVX case). Interestingly this did not happened for MPX. Patch bellow changes/fixes the I386_XSTATE_SIZE(XCR0). To fix acctually=20 the problem we decided to improve macro readability. Regards, -Fred Am 11/25/2013 2:40 PM, schrieb Walfred Tedeschi: > Macro returning the size of the xsave buffer got broken with the MPX > patch. Fix improves the macro to make it more readable. > > 2013-12-25 Walfred Tedeschi > > * i386-xstate.h (I386_XSTATE_MPX): New Macro. > (I386_XSTATE_MPX_MASK): Makes use of I386_XSTATE_MPX. > (HAS_MPX): New macro. > (HAS_AVX): New macro. > (I386_XSTATE_SIZE): Refactored macro using HAS_MPX and > HAS_AVX. > --- > gdb/common/i386-xstate.h | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/gdb/common/i386-xstate.h b/gdb/common/i386-xstate.h > index e76ecc1..f8b85e3 100644 > --- a/gdb/common/i386-xstate.h > +++ b/gdb/common/i386-xstate.h > @@ -26,14 +26,13 @@ > #define I386_XSTATE_AVX (1ULL << 2) > #define I386_XSTATE_BNDREGS (1ULL << 3) > #define I386_XSTATE_BNDCFG (1ULL << 4) > +#define I386_XSTATE_MPX (I386_XSTATE_BNDREGS | I386_XSTATE_BNDCFG) >=20=20=20 > /* Supported mask and size of the extended state. */ > #define I386_XSTATE_X87_MASK I386_XSTATE_X87 > #define I386_XSTATE_SSE_MASK (I386_XSTATE_X87 | I386_XSTATE_SSE) > #define I386_XSTATE_AVX_MASK (I386_XSTATE_SSE_MASK | I386_XSTATE_AVX) > -#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK \ > - | I386_XSTATE_BNDREGS \ > - | I386_XSTATE_BNDCFG) > +#define I386_XSTATE_MPX_MASK (I386_XSTATE_AVX_MASK | I386_XSTATE_MPX) >=20=20=20 > #define I386_XSTATE_ALL_MASK I386_XSTATE_MPX_MASK >=20=20=20 > @@ -44,11 +43,14 @@ >=20=20=20 > #define I386_XSTATE_MAX_SIZE 1088 >=20=20=20 > +/* In case one of the MPX XCR0 bits is set we consider we have MPX. */ > +#define HAS_MPX(XCR0) (((XCR0) & I386_XSTATE_MPX) =3D=3D I386_XSTATE_BND= REGS) \ > + || (((XCR0) & I386_XSTATE_MPX) =3D=3D I386_XSTATE_BNDCFG) > +#define HAS_AVX(XCR0) ((XCR0) & I386_XSTATE_AVX) =3D=3D I386_XSTATE_AVX > + > /* Get I386 XSAVE extended state size. */ > #define I386_XSTATE_SIZE(XCR0) \ > - (((XCR0) & I386_XSTATE_BNDCFG) !=3D 0 ? I386_XSTATE_BNDCFG_SIZE \ > - : (((XCR0) & I386_XSTATE_BNDREGS) !=3D 0 ? I386_XSTATE_BNDCFG_SIZ= E \ > - : (((XCR0) & I386_XSTATE_AVX_SIZE) !=3D 0 ? I386_XSTATE_AVX_SIZE \ > - : I386_XSTATE_SSE_SIZE))) > + (HAS_MPX (XCR0) ? I386_XSTATE_BNDCFG_SIZE : \ > + (HAS_AVX (XCR0) ? I386_XSTATE_AVX_SIZE : I386_XSTATE_SSE_SIZE)) >=20=20=20 > #endif /* I386_XSTATE_H */ Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052