Re: [PATCH 0/9 V3] Use reinsert breakpoint for vCont;s

Yao Qi
2016-11-24T21:55:19Z

On Mon, Nov 21, 2016 at 10:34:44AM -0500, Antoine Tremblay wrote:
> > Thread 1 either sees the original instruction on address A or the
> > breakpoint instruction. Unless ptrace read/write 32-bit is not
> > atomic, IOW, partial ptrace write result is visible to other
> > threads, I don't see why we get SIGILL here.
>
> I think this is the problem, ptrace read/write doesn't seem to be
> atomic, and thread 1 sees some half written memory. (Given that we get
> SIGILL/SIGSEGV issues)

We need to check in linux-arm-kernel@.

>
> Did you have any reference suggesting it was atomic ?
>

No.

> While testing it seems to be atomic for 32bit writes but in thumb mode
> with a 16 byte write, it is not.

I think you meant "16 bit write". Why is that?

>
> Given the SIGILL/SIGSEG I get maybe that one is 2 writes of 1 byte ?
> I'll have to dig in the ptrace code I guess.
>

It is good to get some a clear answer instead of ambiguous speculation.
I think we need to ask in linux-arm-kernel@

--
Yao