From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3182 invoked by alias); 26 Apr 2012 15:04:30 -0000 Received: (qmail 3173 invoked by uid 22791); 26 Apr 2012 15:04:28 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL,BAYES_00,KHOP_THREADED,TW_AV,TW_FP,TW_IW,TW_MX,TW_VF,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 26 Apr 2012 15:04:14 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id EF63E2F7800A; Thu, 26 Apr 2012 16:04:08 +0100 (BST) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hyNHmkLSWUyq; Thu, 26 Apr 2012 16:04:05 +0100 (BST) Message-ID: <4F9963E3.4060107@eCosCentric.com> Date: Thu, 26 Apr 2012 15:07:00 -0000 From: Jonathan Larmour User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.24) Gecko/20111108 Fedora/3.1.16-1.fc14 Lightning/1.0b3pre Thunderbird/3.1.16 MIME-Version: 1.0 To: Sergio Durigan Junior CC: gdb-patches@sourceware.org, Ilija Kocho , Terry Guo , Pedro Alves Subject: Re: [patch] Add support for VFP d16 layout for Cortex-M4 References: <4F902B4E.9070704@eCosCentric.com> In-Reply-To: Content-Type: multipart/mixed; boundary="------------000705010400000607030500" Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-04/txt/msg00913.txt.bz2 This is a multi-part message in MIME format. --------------000705010400000607030500 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-length: 1067 On 26/04/12 01:50, Sergio Durigan Junior wrote: > > I have recently (a.k.a. today) modified the code that generates these > `features' .c files. Could you please regenerate it when/if you repost > the patch? No problem. Here is the updated patch. Pedro, let me know if it's ok to commit or not, thanks. Jifl 2012-04-26 Jonathan Larmour * arm-tdep.h (VFP_REGISTER_SIZE): Define. * features/arm-with-m-vfp-d16.xml: New file. Describes Cortex-M with VFPv4-sp-d16 FPU register layout. * features/Makefile (WHICH): Add arm-with-m-vfp-d16. * features/arm-with-m-vfp-d16.c: New. Generated from above. * arm-tdep.c: Include arm-with-m-vfp-d16.c. (arm-register_g_packet_guesses): Add vfp-d16 guess. (_initialise_arm_tdep): Initialize arm-with-m-vfp-d16 tdesc. -- eCosCentric Limited http://www.eCosCentric.com/ The eCos experts Barnwell House, Barnwell Drive, Cambridge, UK. Tel: +44 1223 245571 Registered in England and Wales: Reg No 4422071. ------["Si fractum non sit, noli id reficere"]------ Opinions==mine --------------000705010400000607030500 Content-Type: text/plain; name="vfpd16a.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="vfpd16a.patch" Content-length: 7346 Index: arm-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/arm-tdep.c,v retrieving revision 1.361 diff -u -5 -p -r1.361 arm-tdep.c --- arm-tdep.c 20 Apr 2012 23:39:57 -0000 1.361 +++ arm-tdep.c 26 Apr 2012 14:55:38 -0000 @@ -57,10 +57,11 @@ #include "record.h" #include "features/arm-with-m.c" #include "features/arm-with-m-fpa-layout.c" +#include "features/arm-with-m-vfp-d16.c" #include "features/arm-with-iwmmxt.c" #include "features/arm-with-vfpv2.c" #include "features/arm-with-vfpv3.c" #include "features/arm-with-neon.c" @@ -9696,10 +9697,18 @@ arm_register_g_packet_guesses (struct gd register_remote_g_packet_guess (gdbarch, /* r0-r12,sp,lr,pc; xpsr */ (16 * INT_REGISTER_SIZE) + INT_REGISTER_SIZE, tdesc_arm_with_m); + + /* M-profile plus M4F VFP. */ + register_remote_g_packet_guess (gdbarch, + /* r0-r12,sp,lr,pc; d0-d15; fpscr,xpsr */ + (16 * INT_REGISTER_SIZE) + + (16 * VFP_REGISTER_SIZE) + + (2 * INT_REGISTER_SIZE), + tdesc_arm_with_m_vfp_d16); } /* Otherwise we don't have a useful guess. */ } @@ -10331,10 +10340,11 @@ _initialize_arm_tdep (void) arm_elf_osabi_sniffer); /* Initialize the standard target descriptions. */ initialize_tdesc_arm_with_m (); initialize_tdesc_arm_with_m_fpa_layout (); + initialize_tdesc_arm_with_m_vfp_d16 (); initialize_tdesc_arm_with_iwmmxt (); initialize_tdesc_arm_with_vfpv2 (); initialize_tdesc_arm_with_vfpv3 (); initialize_tdesc_arm_with_neon (); Index: arm-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/arm-tdep.h,v retrieving revision 1.56 diff -u -5 -p -r1.56 arm-tdep.h --- arm-tdep.h 27 Mar 2012 15:46:33 -0000 1.56 +++ arm-tdep.h 26 Apr 2012 14:55:38 -0000 @@ -69,10 +69,14 @@ enum gdb_regnum { /* Say how long FP registers are. Used for documentation purposes and code readability in this header. IEEE extended doubles are 80 bits. DWORD aligned they use 96 bits. */ #define FP_REGISTER_SIZE 12 +/* Say how long VFP double precision registers are. Used for documentation + purposes and code readability. These are fixed at 64 bits. */ +#define VFP_REGISTER_SIZE 8 + /* Number of machine registers. The only define actually required is gdbarch_num_regs. The other definitions are used for documentation purposes and code readability. */ /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS) (and called PS for processor status) so the status bits can be cleared Index: features/Makefile =================================================================== RCS file: /cvs/src/src/gdb/features/Makefile,v retrieving revision 1.27 diff -u -5 -p -r1.27 Makefile --- features/Makefile 20 Apr 2012 23:39:58 -0000 1.27 +++ features/Makefile 26 Apr 2012 14:55:38 -0000 @@ -29,11 +29,11 @@ # configured for the correct architecture, so the files are again kept # in the GDB repository. To generate C files: # make GDB=/path/to/gdb XMLTOC="xml files" cfiles WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \ - arm-with-m arm-with-m-fpa-layout \ + arm-with-m arm-with-m-fpa-layout arm-with-m-vfp-d16 \ i386/i386 i386/i386-linux \ i386/i386-mmx i386/i386-mmx-linux \ i386/amd64 i386/amd64-linux \ i386/i386-avx i386/i386-avx-linux \ i386/amd64-avx i386/amd64-avx-linux \ Index: features/arm-with-m-vfp-d16.c =================================================================== RCS file: features/arm-with-m-vfp-d16.c diff -N features/arm-with-m-vfp-d16.c --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ features/arm-with-m-vfp-d16.c 26 Apr 2012 14:55:38 -0000 @@ -0,0 +1,53 @@ +/* THIS FILE IS GENERATED. Original: arm-with-m-vfp-d16.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_m_vfp_d16; +static void +initialize_tdesc_arm_with_m_vfp_d16 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.m-profile"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "xpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.vfp"); + tdesc_create_reg (feature, "d0", 26, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d1", 27, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d2", 28, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d3", 29, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d4", 30, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d5", 31, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d6", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d7", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d8", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d9", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d10", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d11", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d12", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d13", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d14", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d15", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 42, 1, "float", 32, "int"); + + tdesc_arm_with_m_vfp_d16 = result; +} Index: features/arm-with-m-vfp-d16.xml =================================================================== RCS file: features/arm-with-m-vfp-d16.xml diff -N features/arm-with-m-vfp-d16.xml --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ features/arm-with-m-vfp-d16.xml 26 Apr 2012 14:55:38 -0000 @@ -0,0 +1,13 @@ + + + + + + + + + --------------000705010400000607030500--