From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30635 invoked by alias); 10 Aug 2011 14:05:09 -0000 Received: (qmail 30216 invoked by uid 22791); 10 Aug 2011 14:05:06 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 10 Aug 2011 14:04:46 +0000 Received: (qmail 4753 invoked from network); 10 Aug 2011 14:04:45 -0000 Received: from unknown (HELO ?192.168.0.101?) (yao@127.0.0.2) by mail.codesourcery.com with ESMTPA; 10 Aug 2011 14:04:45 -0000 Message-ID: <4E428FFE.9060109@codesourcery.com> Date: Wed, 10 Aug 2011 14:05:00 -0000 From: Yao Qi User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.18) Gecko/20110617 Lightning/1.0b2 Thunderbird/3.1.11 MIME-Version: 1.0 To: Mark Kettenis CC: gdb-patches@sourceware.org Subject: Re: [RFA 7/8] New port: TI C6x: test case fixes References: <4E263904.8030204@codesourcery.com> <4E2D1AC1.9070102@codesourcery.com> <201108091522.12881.pedro@codesourcery.com> <4E414C49.9020507@codesourcery.com> <201108091515.p79FFoUs007220@glazunov.sibelius.xs4all.nl> <4E415152.8020905@codesourcery.com> <201108101227.p7ACR31R013872@glazunov.sibelius.xs4all.nl> In-Reply-To: <201108101227.p7ACR31R013872@glazunov.sibelius.xs4all.nl> Content-Type: multipart/mixed; boundary="------------030606080805050506060207" X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-08/txt/msg00218.txt.bz2 This is a multi-part message in MIME format. --------------030606080805050506060207 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Content-length: 3113 On 08/10/2011 08:27 PM, Mark Kettenis wrote: >> Date: Tue, 09 Aug 2011 23:25:06 +0800 >> From: Yao Qi >> >> On 08/09/2011 11:15 PM, Mark Kettenis wrote: >>> Why depend on this NOMMU-magic? Just install the signal handler for >>> bth SIGSEGV and SIGILL, try a store to (or perhaps a read from) >>> address 0, and then fall through to executing an illegal instruction. >> >> Because I want to reduce the scope of using invalid instruction. We >> only need to know the invalid instruction for HAS_NOMMU arch, and emit >> error if we forget to define an invalid instruction for a new NOMMU >> port. Do it make sense? > > I don't really think that's an issue. If the test is run on an > mmu-less machine for which no illegal instruction is defined, the test > will fail. That should prompt someone to look at the test and add the > missing instruction. > If you don't think that is an issue, I am OK with it. Updated my patch for it. > I really just want to avoid the #ifdef maze you're creating which > makes the code more complicated and the test less generic. I think > you're too much focussed on reducing the number of FAILs for your > particular target to zero instead of improving the tests such that > they become more generally useful. For example: > I don't know how did you get such impression, but I really want to convert/refactor test cases as general as they can be. gdb-patches@ archive can show my recent work is about this. >> diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp >> index eeee0ff..4408137 100644 >> --- a/gdb/testsuite/gdb.base/savedregs.exp >> +++ b/gdb/testsuite/gdb.base/savedregs.exp >> @@ -84,6 +84,14 @@ proc process_saved_regs { current inner outer } { >> # Sigtramp frames don't yet print . >> set pat "Stack frame at .* Saved registers:.*" >> } >> + thrower { >> + if { [istarget tic6x-*-*] } { >> + # On tic6x, there is no register saved in function thrower. >> + set pat "Stack frame at .* in $func .*" >> + } else { >> + set pat "Stack frame at .* in $func .* Saved registers:.*" >> + } > > Why are you special-casing tic6x here? Is the architecture really > that special that there are no saved registers? I suspect it isn't > and that this can happen on other architectures as well, depending on > how much optimization the compiler is doing. Leave tic6x alone at first, it is the test case's problem here to expect "save registers in a frame", because it is possible there is no register saved on a certain frame. IMO, tic6x port exposes such problem, and my fix in this patch is to make tests "more generally useful". If we see "no registers saved" on other ports, we can put these targets together in this condition checking, like, if { [istarget tic6x-*-*] || [istarget foo-*-*] || [istarget bar-*-*]} { # On tic6x/foo/bar, there is no register saved in function thrower. set pat "Stack frame at .* in $func .*" } else { set pat "Stack frame at .* in $func .* Saved registers:.*" } Is it OK to you? -- Yao (齐尧) --------------030606080805050506060207 Content-Type: text/x-patch; name="0008-test-case.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0008-test-case.patch" Content-length: 4361 gdb/testsuite/ * gdb.base/maint.exp: set data_section to ".neardata". * gdb.base/savedregs.c (thrower): Trigger SIGILL on NO-MMU machine. * gdb.base/savedregs.exp: Handle SIGILL. (process_saved_regs): Don't check saved register on tic6x-*-* * gdb.mi/mi-syn-frame.c (bar): Trigger SIGILL on NO-MMU machine. * gdb.xml/tdesc-regs.exp: Set core-regs for tic6x-*-*. --- gdb/testsuite/gdb.base/maint.exp | 5 +++++ gdb/testsuite/gdb.base/savedregs.c | 14 ++++++++++++++ gdb/testsuite/gdb.base/savedregs.exp | 9 +++++++++ gdb/testsuite/gdb.mi/mi-syn-frame.c | 13 +++++++++++-- gdb/testsuite/gdb.xml/tdesc-regs.exp | 3 +++ 5 files changed, 42 insertions(+), 2 deletions(-) diff --git a/gdb/testsuite/gdb.base/maint.exp b/gdb/testsuite/gdb.base/maint.exp index 61ad439..2bd2593 100644 --- a/gdb/testsuite/gdb.base/maint.exp +++ b/gdb/testsuite/gdb.base/maint.exp @@ -394,6 +394,11 @@ gdb_test_multiple "maint info sections" "maint info sections" { set data_section ER_RW pass "maint info sections" } + -re "Exec file:\r\n.*break($EXEEXT)?., file type.*neardata.*$gdb_prompt $" { + # c6x doesn't have .data section. It has .neardata and .fardata section. + set data_section ".neardata" + pass "maint info sections" + } -re "Exec file:\r\n.*break($EXEEXT)?., file type.*$gdb_prompt $" { pass "maint info sections" } diff --git a/gdb/testsuite/gdb.base/savedregs.c b/gdb/testsuite/gdb.base/savedregs.c index 9f302a0..4f962ac 100644 --- a/gdb/testsuite/gdb.base/savedregs.c +++ b/gdb/testsuite/gdb.base/savedregs.c @@ -45,11 +45,25 @@ catcher (int sig) static void thrower (void) { + /* Trigger a SIGSEGV. */ *(char *)0 = 0; + + /* On MMU-less system, previous memory access to address zero doesn't + trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its + own illegal instruction here. */ + +#if defined(__arm__) + asm(".word 0xf8f00000"); +#elif defined(__TMS320C6X__) + asm(".word 0x56454313"); +#else +#endif + } main () { + signal (SIGILL, catcher); signal (SIGSEGV, catcher); thrower (); } diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp index eeee0ff..4408137 100644 --- a/gdb/testsuite/gdb.base/savedregs.exp +++ b/gdb/testsuite/gdb.base/savedregs.exp @@ -84,6 +84,14 @@ proc process_saved_regs { current inner outer } { # Sigtramp frames don't yet print . set pat "Stack frame at .* Saved registers:.*" } + thrower { + if { [istarget tic6x-*-*] } { + # On tic6x, there is no register saved in function thrower. + set pat "Stack frame at .* in $func .*" + } else { + set pat "Stack frame at .* in $func .* Saved registers:.*" + } + } default { set pat "Stack frame at .* in $func .* Saved registers:.*" } @@ -143,6 +151,7 @@ process_saved_regs thrower { main } { } # Continue to the signal catcher, check main's saved-reg info, capture # catcher's saved-reg info. gdb_test "handle SIGSEGV pass print nostop" +gdb_test "handle SIGILL pass print nostop" gdb_test "advance catcher" "catcher .* at .*" process_saved_regs catcher { sigtramp thrower } { main } diff --git a/gdb/testsuite/gdb.mi/mi-syn-frame.c b/gdb/testsuite/gdb.mi/mi-syn-frame.c index ddfc08e..332f246 100644 --- a/gdb/testsuite/gdb.mi/mi-syn-frame.c +++ b/gdb/testsuite/gdb.mi/mi-syn-frame.c @@ -25,9 +25,18 @@ foo (void) void bar (void) { - char *nuller = 0; + *(char *)0 = 0; /* try to cause a segfault */ + + /* On MMU-less system, previous memory access to address zero doesn't + trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its + own illegal instruction here. */ +#if defined(__arm__) + asm(".word 0xf8f00000"); +#elif defined(__TMS320C6X__) + asm(".word 0x56454313"); +#else +#endif - *nuller = 'a'; /* try to cause a segfault */ } void diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp index 224c082..6a12dba 100644 --- a/gdb/testsuite/gdb.xml/tdesc-regs.exp +++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp @@ -53,6 +53,9 @@ switch -glob -- [istarget] { unsupported "register tests" return 0 } + "tic6x-*-*" { + set core-regs {tic6x-core.xml} + } "i?86-*-*" { set architecture "i386" set regdir "i386/" -- 1.7.0.4 --------------030606080805050506060207--