From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27918 invoked by alias); 20 Jun 2011 15:07:57 -0000 Received: (qmail 27909 invoked by uid 22791); 20 Jun 2011 15:07:56 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 20 Jun 2011 15:07:43 +0000 Received: (qmail 30463 invoked from network); 20 Jun 2011 15:07:42 -0000 Received: from unknown (HELO ?192.168.0.102?) (yao@127.0.0.2) by mail.codesourcery.com with ESMTPA; 20 Jun 2011 15:07:42 -0000 Message-ID: <4DFF6239.9090203@codesourcery.com> Date: Mon, 20 Jun 2011 15:07:00 -0000 From: Yao Qi User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Mark Kettenis CC: gdb-patches@sourceware.org Subject: Re: [patch V2, testsuite] gdb.base/savedregs.exp: SIGSEGV -> SIGALRM References: <4DF09229.4070704@codesourcery.com> <201106091117.p59BHRWi025356@glazunov.sibelius.xs4all.nl> <4DF0C613.70101@codesourcery.com> <4DFEC8D8.3000608@codesourcery.com> <201106200701.p5K71m5h030689@glazunov.sibelius.xs4all.nl> <4DFF0418.6060706@codesourcery.com> <201106201110.p5KBAvb1025773@glazunov.sibelius.xs4all.nl> In-Reply-To: <201106201110.p5KBAvb1025773@glazunov.sibelius.xs4all.nl> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-06/txt/msg00263.txt.bz2 On 06/20/2011 07:10 PM, Mark Kettenis wrote: > My concern with using SIGILL (apart from generating an instruction > that forces SIGALL on all architectures we support) is that you're > going to end up testing a different unwinder as well. Typically in > the SIGSEGV case you'll end up at the faulting instruction, which is > defenitely in the function body, where we should be using the DWARF > CFI unwinder. But for SIGILL you could end up at the instruction > after the trapping instruction, which is likely to be in the function > epilogue which may be handled by an epilogue unwinder. Oh, I don't know PC could be the next instruction of that illegal instruction. At least, some years ago, when I was working on PowerPC, PC still points to the illegal instruction when SIGILL is triggered. > >> > Maybe, another option is to define invalid instruction for each targets >> > in test case. > Perhaps a reasonable compromise is to do something like: > > static void > thrower (void) > { > *(char *)0 = 0; > #ifdef __arm__ > asm(".word 0xffff"); > #endif > } > > and then handle both SIGSEGV and SIGILL. Yes, that looks good to me in general. It can be like this, #ifdef __UCLIBC__ #if !(defined(__UCLIBC_HAS_MMU__) || defined(__ARCH_HAS_MMU__)) #define HAS_NOMMU #endif #endif static void thrower (void) { #if defined(HAS_NOMMU) #if defined(__arm__) asm(".word 0xffff"); #elif defined(__foo__) asm(".word 0xeeeee"); // invalid instruction for port foo. #else #error Please write an invalid instruction here for your target #endif #else *(char *)0 = 0; #endif } I'll write a new patch later. -- Yao (齐尧)