On 01/31/2011 11:40 PM, Ulrich Weigand wrote:
> Yao Qi wrote.
> 
>> How about this insn sequence, which should comply with ABI?
>>
>> 	sub sp,	#4
>> 	str pc, [sp]
>> 	ldr r4, [sp]
>> 	add sp, #4
> 
> Why then not simply this:
> 
>    e92d8000        push    {pc}
>    e8bd0010        pop     {r4}
> 
> which should do the same but still is just two instructions?

[Sorry for the late reply.  Back from Chinese Spring Festival holiday.]

I am afraid they are not equal to each other.  The intention of this
complicated insn sequence is used to compute the implementation-defined
constant offset of `str pc'.  See more explanations below.

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204g/Cihbjifh.html

Section "Saving from r15"
[...]
If you do save from r15, the value saved is the address of the current
instruction, plus an implementation-defined constant. The constant is
always the same for a particular processor.
If your assembled code might be used on different processors, you can
find out what the constant is at runtime using code like the following:

    SUB R1, PC, #4 ; R1 = address of following STR instruction
    STR PC, [R0]   ; Store address of STR instruction + offset,
    LDR R0, [R0]   ; then reload it
    SUB R0, R0, R1 ; Calculate the offset as the difference

Some comments are added to explain this in new patch.

-- 
Yao (齐尧)