Index: Makefile.in =================================================================== RCS file: /cvs/src/src/gdb/Makefile.in,v retrieving revision 1.1148 diff -u -r1.1148 Makefile.in --- Makefile.in 31 Jan 2011 04:41:25 -0000 1.1148 +++ Makefile.in 31 Jan 2011 19:28:53 -0000 @@ -540,7 +540,8 @@ moxie-tdep.o \ mt-tdep.o \ nto-tdep.o \ - ppc-linux-tdep.o ppcnbsd-tdep.o ppcobsd-tdep.o ppc-sysv-tdep.o \ + ppcfbsd-tdep.o ppc-linux-tdep.o ppcnbsd-tdep.o ppcobsd-tdep.o \ + ppc-sysv-tdep.o \ rs6000-aix-tdep.o rs6000-tdep.o \ s390-tdep.o \ score-tdep.o \ @@ -772,7 +773,7 @@ gdb_wait.h gdb_assert.h solib.h ppc-tdep.h cp-support.h glibc-tdep.h \ interps.h auxv.h gdbcmd.h tramp-frame.h mipsnbsd-tdep.h \ amd64-linux-tdep.h linespec.h i387-tdep.h mn10300-tdep.h \ -sparc64-tdep.h monitor.h ppcobsd-tdep.h srec.h solib-pa64.h \ +sparc64-tdep.h monitor.h ppcfbsd-tdep.h ppcobsd-tdep.h srec.h solib-pa64.h \ coff-pe-read.h parser-defs.h gdb_ptrace.h mips-linux-tdep.h \ m68k-tdep.h spu-tdep.h jv-lang.h environ.h solib-irix.h amd64-tdep.h \ doublest.h regset.h hppa-tdep.h ppc-linux-tdep.h rs6000-tdep.h \ @@ -1478,6 +1479,7 @@ somread.c solib-som.c \ posix-hdep.c \ ppc-sysv-tdep.c ppc-linux-nat.c ppc-linux-tdep.c \ + ppcfbsd-nat.c ppcfbsd-tdep.c \ ppcnbsd-nat.c ppcnbsd-tdep.c \ ppcobsd-nat.c ppcobsd-tdep.c \ procfs.c \ Index: configure.host =================================================================== RCS file: /cvs/src/src/gdb/configure.host,v retrieving revision 1.105 diff -u -r1.105 configure.host --- configure.host 13 Jan 2011 16:24:12 -0000 1.105 +++ configure.host 31 Jan 2011 19:28:53 -0000 @@ -125,6 +125,7 @@ powerpc-*-aix* | rs6000-*-*) gdb_host=aix ;; +powerpc-*-freebsd*) gdb_host=fbsd ;; powerpc-*-linux*) gdb_host=linux ;; powerpc-*-netbsd* | powerpc-*-knetbsd*-gnu) gdb_host=nbsd ;; Index: configure.tgt =================================================================== RCS file: /cvs/src/src/gdb/configure.tgt,v retrieving revision 1.242 diff -u -r1.242 configure.tgt --- configure.tgt 24 Jan 2011 21:34:19 -0000 1.242 +++ configure.tgt 31 Jan 2011 19:28:54 -0000 @@ -393,6 +393,11 @@ gdb_target_obs="mt-tdep.o" ;; +powerpc-*-freebsd*) + # Target: FreeBSD/powerpc + gdb_target_obs="rs6000-tdep.o ppc-sysv-tdep.o ppcfbsd-tdep.o \ + corelow.o solib.o solib-svr4.o" + ;; powerpc-*-netbsd* | powerpc-*-knetbsd*-gnu) # Target: NetBSD/powerpc gdb_target_obs="rs6000-tdep.o ppc-sysv-tdep.o ppcnbsd-tdep.o \ Index: config/powerpc/fbsd.mh --- /dev/null +++ config/powerpc/fbsd.mh @@ -0,0 +1,5 @@ +# Host: FreeBSD/powerpc +NATDEPFILES= fbsd-nat.o fork-child.o gcore.o \ + inf-ptrace.o ppcfbsd-nat.o bsd-kvm.o + +LOADLIBES= -lkvm Index: ./ppcfbsd-nat.c --- /dev/null +++ ./ppcfbsd-nat.c @@ -0,0 +1,234 @@ +/* Native-dependent code for PowerPC's running FreeBSD, for GDB. + + Copyright (C) 2002, 2004, 2011 + Free Software Foundation, Inc. + + Parts contributed by Wasabi Systems, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "defs.h" +#include "gdbcore.h" +#include "inferior.h" +#include "regcache.h" + +#include "gdb_assert.h" +#include +#include +#include +#include +#include +#include +#include +#include + +#include "fbsd-nat.h" +#include "gregset.h" +#include "ppc-tdep.h" +#include "ppcfbsd-tdep.h" +#include "inf-ptrace.h" +#include "bsd-kvm.h" + + +void +supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) +{ + const struct regset *regset = ppc_fbsd_gregset (sizeof (long)); + + ppc_supply_gregset (regset, regcache, -1, gregsetp, sizeof (*gregsetp)); +} + +void +fill_gregset (const struct regcache *regcache, + gdb_gregset_t *gregsetp, int regno) +{ + const struct regset *regset = ppc_fbsd_gregset (sizeof (long)); + + if (regno == -1) + memset (gregsetp, 0, sizeof (*gregsetp)); + ppc_collect_gregset (regset, regcache, regno, gregsetp, sizeof (*gregsetp)); +} + +void +supply_fpregset (struct regcache *regcache, const gdb_fpregset_t * fpregsetp) +{ + const struct regset *regset = ppc_fbsd_fpregset (); + + ppc_supply_fpregset (regset, regcache, -1, + fpregsetp, sizeof (*fpregsetp)); +} + +void +fill_fpregset (const struct regcache *regcache, + gdb_fpregset_t *fpregsetp, int regno) +{ + const struct regset *regset = ppc_fbsd_fpregset (); + + ppc_collect_fpregset (regset, regcache, regno, + fpregsetp, sizeof (*fpregsetp)); +} + +static int +getfpregs_supplies (struct gdbarch *gdbarch, int regno) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating + point registers. Traditionally, GDB's register set has still + listed the floating point registers for such machines, so this + code is harmless. However, the new E500 port actually omits the + floating point registers entirely from the register set --- they + don't even have register numbers assigned to them. + + It's not clear to me how best to update this code, so this assert + will alert the first person to encounter the NetBSD/E500 + combination to the problem. */ + gdb_assert (ppc_floating_point_unit_p (gdbarch)); + + return ((regno >= tdep->ppc_fp0_regnum + && regno < tdep->ppc_fp0_regnum + ppc_num_fprs) + || regno == tdep->ppc_fpscr_regnum); +} + +static void +ppcfbsd_fetch_inferior_registers (struct target_ops *ops, + struct regcache *regcache, int regno) +{ + struct reg regs; + + if (ptrace (PT_GETREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) ®s, 0) == -1) + perror_with_name (_("Couldn't get registers")); + + ppc_supply_gregset (&ppcfbsd_gregset, regcache, regno, + ®s, sizeof regs); + + if (regno == -1 || getfpregs_supplies (get_regcache_arch (regcache), regno)) + { + struct fpreg fpregs; + + if (ptrace (PT_GETFPREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) + perror_with_name (_("Couldn't get FP registers")); + + ppc_supply_fpregset (&ppcfbsd_fpregset, regcache, regno, + &fpregs, sizeof fpregs); + } +} + +static void +ppcfbsd_store_inferior_registers (struct target_ops *ops, + struct regcache *regcache, int regno) +{ + struct reg regs; + + if (ptrace (PT_GETREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) ®s, 0) == -1) + perror_with_name (_("Couldn't get registers")); + + ppc_collect_gregset (&ppcfbsd_gregset, regcache, + regno, ®s, sizeof regs); + + if (ptrace (PT_SETREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) ®s, 0) == -1) + perror_with_name (_("Couldn't write registers")); + + + if (regno == -1 || getfpregs_supplies (get_regcache_arch (regcache), regno)) + { + struct fpreg fpregs; + + if (ptrace (PT_GETFPREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) + perror_with_name (_("Couldn't get FP registers")); + + ppc_collect_fpregset (&ppcfbsd_fpregset, regcache, + regno, &fpregs, sizeof fpregs); + + if (ptrace (PT_SETFPREGS, PIDGET (inferior_ptid), + (PTRACE_TYPE_ARG3) &fpregs, 0) == -1) + perror_with_name (_("Couldn't set FP registers")); + } +} + +static int +ppcfbsd_supply_pcb (struct regcache *regcache, struct pcb *pcb) +{ + struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int i, regnum; + + /* The stack pointer shouldn't be zero. */ + if (pcb->pcb_sp == 0) + return 0; + + regcache_raw_supply (regcache, gdbarch_sp_regnum (gdbarch), &pcb->pcb_sp); + regcache_raw_supply (regcache, tdep->ppc_cr_regnum, &pcb->pcb_cr); + regcache_raw_supply (regcache, tdep->ppc_lr_regnum, &pcb->pcb_lr); + for (i = 0, regnum = tdep->ppc_gp0_regnum + 14; i < 20; i++, regnum++) + regcache_raw_supply (regcache, regnum, &pcb->pcb_context[i]); + + return 1; +} + +/* Provide a prototype to silence -Wmissing-prototypes. */ +void _initialize_ppcfbsd_nat (void); + +void +_initialize_ppcfbsd_nat (void) +{ + struct target_ops *t; + + /* Add in local overrides. */ + t = inf_ptrace_target (); + t->to_fetch_registers = ppcfbsd_fetch_inferior_registers; + t->to_store_registers = ppcfbsd_store_inferior_registers; + t->to_pid_to_exec_file = fbsd_pid_to_exec_file; + t->to_find_memory_regions = fbsd_find_memory_regions; + t->to_make_corefile_notes = fbsd_make_corefile_notes; + add_target (t); + + /* General-purpose registers. */ + ppcfbsd_reg_offsets.r0_offset = offsetof (struct reg, fixreg); + ppcfbsd_reg_offsets.gpr_size = 4; + ppcfbsd_reg_offsets.xr_size = 4; + ppcfbsd_reg_offsets.lr_offset = offsetof (struct reg, lr); + ppcfbsd_reg_offsets.cr_offset = offsetof (struct reg, cr); + + ppcfbsd_reg_offsets.xer_offset = offsetof (struct reg, xer); + ppcfbsd_reg_offsets.ctr_offset = offsetof (struct reg, ctr); + ppcfbsd_reg_offsets.pc_offset = offsetof (struct reg, pc); + + + + /* Floating-point registers. */ + +#ifdef PT_GETFPREGS + ppcfbsd_fpreg_offsets.f0_offset = offsetof (struct fpreg, fpreg); + ppcfbsd_fpreg_offsets.fpscr_offset = offsetof (struct fpreg, fpscr); + ppcfbsd_fpreg_offsets.fpscr_size = 8; +#endif + +#ifdef NOTYET + /* AltiVec registers. */ + ppcfbsd_reg_offsets.vr0_offset = 0; + ppcfbsd_reg_offsets.vrsave_offset = 512; + ppcfbsd_reg_offsets.vscr_offset = 524; +#endif + + /* Support debugging kernel virtual memory images. */ + bsd_kvm_add_target (ppcfbsd_supply_pcb); +} Index: ./ppcfbsd-tdep.h --- /dev/null +++ ./ppcfbsd-tdep.h @@ -0,0 +1,38 @@ +/* Target-dependent code for GDB on PowerPC systems running FreeBSD. + + Copyright (C) 2002, 2011 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef PPCFBSD_TDEP_H +#define PPCFBSD_TDEP_H + +#include + +/* Register offsets for FreeBSD/powerpc. */ +extern struct ppc_reg_offsets ppcfbsd_reg_offsets; +extern struct ppc_reg_offsets ppcfbsd_fpreg_offsets; + +/* Register sets for FreeBSD/powerpc. */ +extern struct regset ppcfbsd_gregset; +extern struct regset ppcfbsd_fpregset; + +/* From ppcfbsd-tdep.c ... */ +const struct regset *ppc_fbsd_gregset (int); +const struct regset *ppc_fbsd_fpregset (void); + +#endif /* PPCFBSD_TDEP_H */ Index: ./ppcfbsd-tdep.c --- /dev/null +++ ./ppcfbsd-tdep.c @@ -0,0 +1,277 @@ +/* Target-dependent code for PowerPC systems running FreeBSD. + + Copyright (C) 2002, 2003, 2004, 2011 + Free Software Foundation, Inc. + + Parts contributed by Wasabi Systems, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "defs.h" +#include "arch-utils.h" +#include "frame.h" +#include "frame-unwind.h" +#include "gdbtypes.h" +#include "osabi.h" +#include "regcache.h" +#include "regset.h" +#include "symtab.h" +#include "trad-frame.h" + +#include "gdb_assert.h" +#include "gdb_string.h" + +#include "ppc-tdep.h" +#include "ppcfbsd-tdep.h" +#include "solib-svr4.h" + +/* For FreeBSD register offsets see . */ +struct ppc_reg_offsets ppcfbsd_reg_offsets; +struct ppc_reg_offsets ppcfbsd_fpreg_offsets; + +/* FreeBSD/powerpc register set. */ +struct regset ppcfbsd_gregset = +{ + &ppcfbsd_reg_offsets, + ppc_supply_gregset, + ppc_collect_gregset +}; + +struct regset ppcfbsd_fpregset = +{ + &ppcfbsd_fpreg_offsets, + ppc_supply_fpregset, + ppc_collect_fpregset +}; + +const struct regset * +ppc_fbsd_gregset (int wordsize) +{ + return &ppcfbsd_gregset; +} + +const struct regset * +ppc_fbsd_fpregset (void) +{ + return &ppcfbsd_fpregset; +} + +/* Return the appropriate register set for the core section identified + by SECT_NAME and SECT_SIZE. */ + +static const struct regset * +ppcfbsd_regset_from_core_section (struct gdbarch *gdbarch, + const char *sect_name, size_t sect_size) +{ + if (strcmp (sect_name, ".reg") == 0 && sect_size >= 148) + return &ppcfbsd_gregset; + + if (strcmp (sect_name, ".reg2") == 0 && sect_size >= 264) + return &ppcfbsd_fpregset; + + return NULL; +} + +/* Default page size. */ +static const int ppcfbsd_page_size = 4096; + +/* Offset for sigreturn(2). */ +static const int ppcfbsd_sigreturn_offset[] = { + 0xc, /* FreeBSD */ + -1 +}; + +/* Signal trampolines. */ + +static int +ppcfbsd_sigtramp_frame_sniffer (const struct frame_unwind *self, + struct frame_info *this_frame, + void **this_cache) +{ + struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + CORE_ADDR pc = get_frame_pc (this_frame); + CORE_ADDR start_pc = (pc & ~(ppcfbsd_page_size - 1)); + const int *offset; + char *name; + + find_pc_partial_function (pc, &name, NULL, NULL); + if (name) + return 0; + + for (offset = ppcfbsd_sigreturn_offset; *offset != -1; offset++) + { + gdb_byte buf[2 * PPC_INSN_SIZE]; + unsigned long insn; + + if (!safe_frame_unwind_memory (this_frame, start_pc + *offset, + buf, sizeof buf)) + continue; + + /* Check for "li r0,SYS_sigreturn". */ + insn = extract_unsigned_integer (buf, PPC_INSN_SIZE, byte_order); + if (insn != 0x380001a1) + continue; + + /* Check for "sc". */ + insn = extract_unsigned_integer (buf + PPC_INSN_SIZE, + PPC_INSN_SIZE, byte_order); + if (insn != 0x44000002) + continue; + + return 1; + } + + return 0; +} + +static struct trad_frame_cache * +ppcfbsd_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache) +{ + struct gdbarch *gdbarch = get_frame_arch (this_frame); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + struct trad_frame_cache *cache; + CORE_ADDR addr, base, func; + gdb_byte buf[PPC_INSN_SIZE]; + int i; + + if (*this_cache) + return *this_cache; + + cache = trad_frame_cache_zalloc (this_frame); + *this_cache = cache; + + func = get_frame_pc (this_frame); + func &= ~(ppcfbsd_page_size - 1); + if (!safe_frame_unwind_memory (this_frame, func, buf, sizeof buf)) + return cache; + + base = get_frame_register_unsigned (this_frame, gdbarch_sp_regnum (gdbarch)); + addr = base + 0x10 + 2 * tdep->wordsize; + for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize) + { + int regnum = i + tdep->ppc_gp0_regnum; + trad_frame_set_reg_addr (cache, regnum, addr); + } + trad_frame_set_reg_addr (cache, tdep->ppc_lr_regnum, addr); + addr += tdep->wordsize; + trad_frame_set_reg_addr (cache, tdep->ppc_cr_regnum, addr); + addr += tdep->wordsize; + trad_frame_set_reg_addr (cache, tdep->ppc_xer_regnum, addr); + addr += tdep->wordsize; + trad_frame_set_reg_addr (cache, tdep->ppc_ctr_regnum, addr); + addr += tdep->wordsize; + trad_frame_set_reg_addr (cache, gdbarch_pc_regnum (gdbarch), addr); + /* SRR0? */ + addr += tdep->wordsize; + + /* Construct the frame ID using the function start. */ + trad_frame_set_id (cache, frame_id_build (base, func)); + + return cache; +} + +static void +ppcfbsd_sigtramp_frame_this_id (struct frame_info *this_frame, + void **this_cache, struct frame_id *this_id) +{ + struct trad_frame_cache *cache = + ppcfbsd_sigtramp_frame_cache (this_frame, this_cache); + + trad_frame_get_id (cache, this_id); +} + +static struct value * +ppcfbsd_sigtramp_frame_prev_register (struct frame_info *this_frame, + void **this_cache, int regnum) +{ + struct trad_frame_cache *cache = + ppcfbsd_sigtramp_frame_cache (this_frame, this_cache); + + return trad_frame_get_register (cache, this_frame, regnum); +} + +static const struct frame_unwind ppcfbsd_sigtramp_frame_unwind = { + SIGTRAMP_FRAME, + ppcfbsd_sigtramp_frame_this_id, + ppcfbsd_sigtramp_frame_prev_register, + NULL, + ppcfbsd_sigtramp_frame_sniffer +}; + +static void +ppcfbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) +{ + + /* FreeBSD doesn't support the 128-bit `long double' from the psABI. */ + set_gdbarch_long_double_bit (gdbarch, 64); + set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); + + /* FreeBSD currently uses a broken GCC. */ + set_gdbarch_return_value (gdbarch, ppc_sysv_abi_broken_return_value); + + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); + set_solib_svr4_fetch_link_map_offsets (gdbarch, + svr4_ilp32_fetch_link_map_offsets); + set_gdbarch_regset_from_core_section + (gdbarch, ppcfbsd_regset_from_core_section); + + frame_unwind_append_unwinder (gdbarch, &ppcfbsd_sigtramp_frame_unwind); + +} + +/* Provide a prototype to silence -Wmissing-prototypes. */ +void _initialize_ppcfbsd_tdep (void); + +void +_initialize_ppcfbsd_tdep (void) +{ + gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_FREEBSD_ELF, + ppcfbsd_init_abi); + gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_FREEBSD_ELF, + ppcfbsd_init_abi); + + /* Avoid initializing the register offsets again if they were + already initailized by ppcfbsd-nat.c. */ + if (ppcfbsd_reg_offsets.pc_offset == 0) + { + /* General-purpose registers. */ + ppcfbsd_reg_offsets.r0_offset = 0; + ppcfbsd_reg_offsets.lr_offset = 128; + ppcfbsd_reg_offsets.cr_offset = 132; + ppcfbsd_reg_offsets.xer_offset = 136; + ppcfbsd_reg_offsets.ctr_offset = 140; + ppcfbsd_reg_offsets.pc_offset = 144; + ppcfbsd_reg_offsets.ps_offset = -1; + ppcfbsd_reg_offsets.mq_offset = -1; + + if (ppcfbsd_fpreg_offsets.fpscr_offset == 0) + { + /* Floating-point registers. */ + ppcfbsd_reg_offsets.f0_offset = 0; + ppcfbsd_reg_offsets.fpscr_offset = 256; + ppcfbsd_reg_offsets.fpscr_size = 8; + } + +#ifdef NOTYET + /* AltiVec registers. */ + ppcfbsd_reg_offsets.vr0_offset = 0; + ppcfbsd_reg_offsets.vrsave_offset = 512; + ppcfbsd_reg_offsets.vscr_offset = 524; +#endif + } +}