Re: [patch 1/3] Displaced stepping for 16-bit Thumb instructions

Yao Qi
2010-12-25T14:13:36Z

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Patch 1 is about refactoring, without any effect on functionality.

--
Yao (é½å°§)

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2010-12-25 Yao Qi <yao@codesourcery.com>

* gdb/arm-tdep.c (arm_displaced_step_copy_insn): Move code to ...
(arm_process_displaced_insn): .. here. Remove parameter INSN.
(thumb_process_displaced_insn): New.
* gdb/arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Update
call to arm_process_displaced_insn.
* gdb/arm-tdep.h : Update declaration of arm_process_displaced_insn.

diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c
index 4758ded..06f386a 100644
--- a/gdb/arm-linux-tdep.c
+++ b/gdb/arm-linux-tdep.c
@@ -913,18 +913,10 @@ arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
}
else
{
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order);
-
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
- "at %.8lx\n", (unsigned long) insn,
- (unsigned long) from);
-
/* Override the default handling of SVC instructions. */
dsc->u.svc.copy_svc_os = arm_linux_copy_svc;

- arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
+ arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
}

arm_displaced_init_closure (gdbarch, from, to, dsc);
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index d4013c6..64aa500 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -5837,16 +5837,22 @@ decode_svc_copro (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
else
return copy_undef (gdbarch, insn, dsc); /* Possibly unreachable. */
}
+static void
+thumb_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ error (_("Displaced stepping is only supported in ARM mode"));
+}

void
-arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn,
- CORE_ADDR from, CORE_ADDR to, struct regcache *regs,
+arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
struct displaced_step_closure *dsc)
{
int err = 0;
-
- if (!displaced_in_arm_mode (regs))
- error (_("Displaced stepping is only supported in ARM mode"));
+ enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
+ uint32_t insn;

/* Most displaced instructions use a 1-instruction scratch space, so set this
here and override below if/when necessary. */
@@ -5856,6 +5862,15 @@ arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn,
dsc->cleanup = NULL;
dsc->wrote_to_pc = 0;

+ if (!displaced_in_arm_mode (regs))
+ return thumb_process_displaced_insn (gdbarch, from, to, regs, dsc);
+
+ insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
+ "at %.8lx\n", (unsigned long) insn,
+ (unsigned long) from);
+
if ((insn & 0xf0000000) == 0xf0000000)
err = decode_unconditional (gdbarch, insn, regs, dsc);
else switch (((insn & 0x10) >> 4) | ((insn & 0xe000000) >> 24))
@@ -5926,15 +5941,7 @@ arm_displaced_step_copy_insn (struct gdbarch *gdbarch,
{
struct displaced_step_closure *dsc
= xmalloc (sizeof (struct displaced_step_closure));
- enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
- uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
-
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
- "at %.8lx\n", (unsigned long) insn,
- (unsigned long) from);
-
- arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
+ arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
arm_displaced_init_closure (gdbarch, from, to, dsc);

return dsc;
diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 61cdb5d..cfb85ff 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -284,9 +284,8 @@ enum pc_write_style
};

extern void
- arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn,
- CORE_ADDR from, CORE_ADDR to,
- struct regcache *regs,
+ arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
struct displaced_step_closure *dsc);
extern void
arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from,