From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18988 invoked by alias); 16 Sep 2008 18:45:13 -0000 Received: (qmail 18938 invoked by uid 22791); 16 Sep 2008 18:45:12 -0000 X-Spam-Check-By: sourceware.org Received: from smtp-outbound-1.vmware.com (HELO smtp-outbound-1.vmware.com) (65.113.40.141) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 16 Sep 2008 18:44:36 +0000 Received: from mailhost2.vmware.com (mailhost2.vmware.com [10.16.64.160]) by smtp-outbound-1.vmware.com (Postfix) with ESMTP id DBF9B67A8; Tue, 16 Sep 2008 11:44:34 -0700 (PDT) Received: from [10.20.92.218] (promb-2s-dhcp218.eng.vmware.com [10.20.92.218]) by mailhost2.vmware.com (Postfix) with ESMTP id BB54D8E5A9; Tue, 16 Sep 2008 11:44:34 -0700 (PDT) Message-ID: <48CFFE21.8030709@vmware.com> Date: Tue, 16 Sep 2008 18:45:00 -0000 From: Michael Snyder User-Agent: Thunderbird 1.5.0.12 (X11/20080411) MIME-Version: 1.0 To: teawater CC: Daniel Jacobowitz , "gdb-patches@sourceware.org" Subject: Re: [reverse RFA] no singlestep-over-BP in reverse References: <48CEAA05.8050006@vmware.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-09/txt/msg00359.txt.bz2 teawater wrote: > I think maybe some reverse target (in the future?) need it. > Someone already know it already deal the breakpoint. But the others > will not know. Maybe I will change inside record to second type. > > > If this single step affect some target, how about let target choice it > with itself? At the moment, my opinion is that gdb needs to be able to expect consistent behavior from the target(s). And I believe that consistent behavior / semantics should be: If you tell me that you are stopped at instruction 1000, regardless of whether you were going forward or backward when you got there, then I will expect that if I tell you to execute forward, you will execute the instruction at 1000. Therefore the machine state at this point should reflect the state BEFORE any side effects of the forward execution of that instruction. This is how it is for forward execution, and it only makes sense to expect the same for reverse execution. Any variables that are changed by the instruction should have their pre- execution values.