From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11048 invoked by alias); 20 Jun 2007 10:19:12 -0000 Received: (qmail 11038 invoked by uid 22791); 20 Jun 2007 10:19:08 -0000 X-Spam-Check-By: sourceware.org Received: from mtagate2.de.ibm.com (HELO mtagate2.de.ibm.com) (195.212.29.151) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 20 Jun 2007 10:19:01 +0000 Received: from d12nrmr1607.megacenter.de.ibm.com (d12nrmr1607.megacenter.de.ibm.com [9.149.167.49]) by mtagate2.de.ibm.com (8.13.8/8.13.8) with ESMTP id l5KAIwbk104842 for ; Wed, 20 Jun 2007 10:18:58 GMT Received: from d12av02.megacenter.de.ibm.com (d12av02.megacenter.de.ibm.com [9.149.165.228]) by d12nrmr1607.megacenter.de.ibm.com (8.13.8/8.13.8/NCO v8.3) with ESMTP id l5KAIwFd3752078 for ; Wed, 20 Jun 2007 12:18:58 +0200 Received: from d12av02.megacenter.de.ibm.com (loopback [127.0.0.1]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id l5KAIvZx019487 for ; Wed, 20 Jun 2007 12:18:57 +0200 Received: from [9.152.248.39] (dyn-9-152-248-39.boeblingen.de.ibm.com [9.152.248.39]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id l5KAItvG019475 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 20 Jun 2007 12:18:57 +0200 Message-ID: <4678FEBE.7040209@de.ibm.com> Date: Wed, 20 Jun 2007 10:19:00 -0000 From: Markus Deuling User-Agent: Thunderbird 1.5.0.10 (X11/20070301) MIME-Version: 1.0 To: GDB Patches , Eli Zaretskii CC: Ulrich Weigand Subject: [rfc] Replace macros by gdbarch functions in gdbint manual Content-Type: multipart/mixed; boundary="------------040600060906090700050007" Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2007-06/txt/msg00388.txt.bz2 This is a multi-part message in MIME format. --------------040600060906090700050007 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1366 Hello, this patch replaces the macros that have been replaced in gdbarch.sh in GDB's manuals. ChangeLog: * gdb.texinfo: Replace following macros by their appropriate gdbarch routines: (TARGET_CHAR_SIGNED, CALL_DUMMY_LOCATION, CANNOT_FETCH_REGISTER) (CANNOT_STORE_REGISTER, GET_LONGJMP_TARGET, POINTER_TO_ADDRESS) (ADDRESS_TO_POINTER, INNER_THAN, FRAME_NUM_ARGS) (HAVE_NONSTEPPABLE_WATCHPOINT, TARGET_SHORT_BIT, TARGET_INT_BIT) (TARGET_LONG_BIT, TARGET_LONG_LONG_BIT, TARGET_FLOAT_BIT) (TARGET_DOUBLE_BIT, TARGET_LONG_DOUBLE_BIT, TARGET_PTR_BIT (TARGET_ADDR_BIT, SP_REGNUM, PC_REGNUM, PS_REGNUM, FP0_REGNUM) (STAB_REG_TO_REGNUM, ECOFF_REG_TO_REGNUM, DWARF_REG_TO_REGNUM) (SDB_REG_TO_REGNUM, DWARF2_REG_TO_REGNUM, BELIEVE_PCC_PROMOTION) (CONVERT_REGISTER_P, REGISTER_TO_VALUE, VALUE_TO_REGISTER) (POINTER_TO_ADDRESS, ADDRESS_TO_POINTER, EXTRACT_RETURN_VALUE) (STORE_RETURN_VALUE, SKIP_PROLOGUE, MEMORY_INSERT_BREAKPOINT) (BREAKPOINT_FROM_PC, MEMORY_REMOVE_BREAKPOINT, DECR_PC_AFTER_BREAK) (ADDR_BITS_REMOVE, TARGET_PRINT_INSN, SKIP_TRAMPOLINE_CODE) (IN_SOLIB_RETURN_TRAMPOLINE, NAME_OF_MALLOC, ADDRESS_CLASS_TYPE_FLAGS) (ADDRESS_CLASS_TYPE_FLAGS_TO_NAME, ADDRESS_CLASS_TYPE_FLAGS_P). * gdb.texinfo: Replace REGISTER_NAME by gdbarch_register_name. Is this ok to commit? -- Markus Deuling GNU Toolchain for Linux on Cell BE deuling@de.ibm.com --------------040600060906090700050007 Content-Type: text/plain; name="diff-gdbint" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="diff-gdbint" Content-length: 31745 diff -urN src/gdb/doc/gdbint.texinfo dev/gdb/doc/gdbint.texinfo --- src/gdb/doc/gdbint.texinfo 2007-05-09 01:39:14.000000000 +0200 +++ dev/gdb/doc/gdbint.texinfo 2007-06-20 12:11:46.000000000 +0200 @@ -569,7 +569,7 @@ For example, the remote target @samp{Z0} packet does not require shadowing memory, so @code{shadow_len} is left at zero. However, -the length reported by @code{BREAKPOINT_FROM_PC} is cached in +the length reported by @code{gdbarch_breakpoint_from_pc} is cached in @code{placed_size}, so that a matching @samp{z0} packet can be used to remove the breakpoint. @@ -604,9 +604,9 @@ which are visible in the output of the @samp{maint info breakpoint} command. -@findex GET_LONGJMP_TARGET -To make this work, you need to define a macro called -@code{GET_LONGJMP_TARGET}, which will examine the @code{jmp_buf} +@findex gdbarch_get_longjmp_target +To make this work, you need to define a function called +@code{gdbarch_get_longjmp_target}, which will examine the @code{jmp_buf} structure and extract the longjmp target address. Since @code{jmp_buf} is target specific, you will need to define it in the appropriate @file{tm-@var{target}.h} file. Look in @file{tm-sun4os4.h} and @@ -732,9 +732,9 @@ If defined to a non-zero value, it is not necessary to disable a watchpoint to step over it. -@findex HAVE_NONSTEPPABLE_WATCHPOINT -@item HAVE_NONSTEPPABLE_WATCHPOINT -If defined to a non-zero value, @value{GDBN} should disable a +@findex gdbarch_have_nonsteppable_watchpoint +@item gdbarch_have_nonsteppable_watchpoint (@var{current_gdbarch}) +If it returns a non-zero value, @value{GDBN} should disable a watchpoint to step the inferior over it. @findex HAVE_CONTINUABLE_WATCHPOINT @@ -1521,7 +1521,7 @@ @{ if (nr_printable_breakpoints > 0) annotate_field (4); - if (TARGET_ADDR_BIT <= 32) + if (gdbarch_addr_bit (current_gdbarch) <= 32) ui_out_table_header (uiout, 10, ui_left, "addr", "Address");/* 5 */ else ui_out_table_header (uiout, 18, ui_left, "addr", "Address");/* 5 */ @@ -2775,7 +2775,7 @@ compiler's idea of which registers are which; however, it is critical that they do match up accurately. The only way to make this work is to get accurate information about the order that the compiler uses, -and to reflect that in the @code{REGISTER_NAME} and related macros. +nd to reflect that in the @code{gdbarch_register_name} and related functions. @value{GDBN} can handle big-endian, little-endian, and bi-endian architectures. @@ -2893,7 +2893,7 @@ definitions, appropriate for architectures on which all pointers are simple unsigned byte addresses. -@deftypefn {Target Macro} CORE_ADDR POINTER_TO_ADDRESS (struct type *@var{type}, char *@var{buf}) +@deftypefn {Target Macro} CORE_ADDR gdbarch_pointer_to_address (struct gdbarch *@var{current_gdbarch}, struct type *@var{type}, char *@var{buf}) Assume that @var{buf} holds a pointer of type @var{type}, in the appropriate format for the current architecture. Return the byte address the pointer refers to. @@ -2902,7 +2902,7 @@ C@t{++} reference type. @end deftypefn -@deftypefn {Target Macro} void ADDRESS_TO_POINTER (struct type *@var{type}, char *@var{buf}, CORE_ADDR @var{addr}) +@deftypefn {Target Macro} void gdbarch_address_to_pointer (struct gdbarch *@var{current_gdbarch}, struct type *@var{type}, char *@var{buf}, CORE_ADDR @var{addr}) Store in @var{buf} a pointer of type @var{type} representing the address @var{addr}, in the appropriate format for the current architecture. @@ -2925,14 +2925,14 @@ types within @value{GDBN} as well as provide the added information to a @value{GDBN} user when printing type expressions. -@deftypefn {Target Macro} int ADDRESS_CLASS_TYPE_FLAGS (int @var{byte_size}, int @var{dwarf2_addr_class}) +@deftypefn {Target Macro} int gdbarch_address_class_type_flags (struct gdbarch *@var{current_gdbarch}, int @var{byte_size}, int @var{dwarf2_addr_class}) Returns the type flags needed to construct a pointer type whose size is @var{byte_size} and whose address class is @var{dwarf2_addr_class}. This function is normally called from within a symbol reader. See @file{dwarf2read.c}. @end deftypefn -@deftypefn {Target Macro} char *ADDRESS_CLASS_TYPE_FLAGS_TO_NAME (int @var{type_flags}) +@deftypefn {Target Macro} char *gdbarch_address_class_type_flags_to_name (struct gdbarch *@var{current_gdbarch}, int @var{type_flags}) Given the type flags representing an address class qualifier, return its name. @end deftypefn @@ -3146,36 +3146,36 @@ following macros to request conversions between the register and memory representations of a data type: -@deftypefn {Target Macro} int CONVERT_REGISTER_P (int @var{reg}) +@deftypefn {Target Macro} int gdbarch_convert_register_p (struct gdbarch *@var{gdbarch}, int @var{reg}) Return non-zero if the representation of a data value stored in this register may be different to the representation of that same data value when stored in memory. -When non-zero, the macros @code{REGISTER_TO_VALUE} and -@code{VALUE_TO_REGISTER} are used to perform any necessary conversion. +When non-zero, the gdbarch functions @code{gdbarch_register_to_value} and +@code{gdbarch_value_to_register} are used to perform any necessary conversion. @end deftypefn -@deftypefn {Target Macro} void REGISTER_TO_VALUE (int @var{reg}, struct type *@var{type}, char *@var{from}, char *@var{to}) +@deftypefn {Target Macro} void gdbarch_register_to_value (struct gdbarch *@var{current_gdbarch}, int @var{reg}, struct type *@var{type}, char *@var{from}, char *@var{to}) Convert the value of register number @var{reg} to a data object of type @var{type}. The buffer at @var{from} holds the register's value in raw format; the converted value should be placed in the buffer at @var{to}. -Note that @code{REGISTER_TO_VALUE} and @code{VALUE_TO_REGISTER} take -their @var{reg} and @var{type} arguments in different orders. +Note that @code{gdbarch_register_to_value} and @code{gdbarch_value_to_register} +take their @var{reg} and @var{type} arguments in different orders. -You should only use @code{REGISTER_TO_VALUE} with registers for which -the @code{CONVERT_REGISTER_P} macro returns a non-zero value. +You should only use @code{gdbarch_register_to_value} with registers for which +the @code{gdbarch_convert_register_p} function returns a non-zero value. @end deftypefn -@deftypefn {Target Macro} void VALUE_TO_REGISTER (struct type *@var{type}, int @var{reg}, char *@var{from}, char *@var{to}) +@deftypefn {Target Macro} void gdbarch_value_to_register (struct gdbarch *@var{current_gdbarch}, struct type *@var{type}, int @var{reg}, char *@var{from}, char *@var{to}) Convert a data value of type @var{type} to register number @var{reg}' raw format. -Note that @code{REGISTER_TO_VALUE} and @code{VALUE_TO_REGISTER} take -their @var{reg} and @var{type} arguments in different orders. +Note that @code{gdbarch_register_to_value} and @code{gdbarch_value_to_register} +take their @var{reg} and @var{type} arguments in different orders. -You should only use @code{VALUE_TO_REGISTER} with registers for which -the @code{CONVERT_REGISTER_P} macro returns a non-zero value. +You should only use @code{gdbarch_value_to_register} with registers for which +the @code{gdbarch_convert_register_p} function returns a non-zero value. @end deftypefn @deftypefn {Target Macro} void REGISTER_CONVERT_TO_TYPE (int @var{regnum}, struct type *@var{type}, char *@var{buf}) @@ -3196,10 +3196,10 @@ @table @code -@item ADDR_BITS_REMOVE (addr) -@findex ADDR_BITS_REMOVE +@item gdbarch_addr_bits_remove (@var{current_gdbarch}, @var{addr}) +@findex gdbarch_addr_bits_remove If a raw machine instruction address includes any bits that are not -really part of the address, then define this macro to expand into an +really part of the address, then set this function to expand into an expression that zeroes those bits in @var{addr}. This is only used for addresses of instructions, and even then not in all contexts. @@ -3207,7 +3207,7 @@ 2.0 architecture contain the privilege level of the corresponding instruction. Since instructions must always be aligned on four-byte boundaries, the processor masks out these bits to generate the actual -address of the instruction. ADDR_BITS_REMOVE should filter out these +address of the instruction. gdbarch_addr_bits_remove should filter out these bits with an expression such as @code{((addr) & ~3)}. @item ADDRESS_CLASS_NAME_TO_TYPE_FLAGS (@var{name}, @var{type_flags_ptr}) @@ -3227,8 +3227,8 @@ Predicate which indicates whether @code{ADDRESS_CLASS_NAME_TO_TYPE_FLAGS} has been defined. -@item ADDRESS_CLASS_TYPE_FLAGS (@var{byte_size}, @var{dwarf2_addr_class}) -@findex ADDRESS_CLASS_TYPE_FLAGS (@var{byte_size}, @var{dwarf2_addr_class}) +@item gdbarch_address_class_type_flags (@var{current_gdbarch}, @var{byte_size}, @var{dwarf2_addr_class}) +@findex gdbarch_address_class_type_flags Given a pointers byte size (as described by the debug information) and the possible @code{DW_AT_address_class} value, return the type flags used by @value{GDBN} to represent this address class. The value @@ -3237,32 +3237,31 @@ values or'd together. @xref{Target Architecture Definition, , Address Classes}. -@item ADDRESS_CLASS_TYPE_FLAGS_P () -@findex ADDRESS_CLASS_TYPE_FLAGS_P -Predicate which indicates whether @code{ADDRESS_CLASS_TYPE_FLAGS} has +@item gdbarch_address_class_type_flags_p (@var{current_gdbarch}) +@findex gdbarch_address_class_type_flags_p +Predicate which indicates whether @code{gdbarch_address_class_type_flags_p} has been defined. -@item ADDRESS_CLASS_TYPE_FLAGS_TO_NAME (@var{type_flags}) -@findex ADDRESS_CLASS_TYPE_FLAGS_TO_NAME +@item gdbarch_address_class_type_flags_to_name (@var{current_gdbarch}, @var{type_flags}) +@findex gdbarch_address_class_type_flags_to_name Return the name of the address class qualifier associated with the type flags given by @var{type_flags}. -@item ADDRESS_CLASS_TYPE_FLAGS_TO_NAME_P () -@findex ADDRESS_CLASS_TYPE_FLAGS_TO_NAME_P -Predicate which indicates whether @code{ADDRESS_CLASS_TYPE_FLAGS_TO_NAME} has -been defined. +@item gdbarch_address_class_type_flags_to_name_p (@var{current_gdbarch}) +@findex gdbarch_address_class_type_flags_to_name_p +Predicate which indicates whether @code{gdbarch_address_class_type_flags_to_name} has been defined. @xref{Target Architecture Definition, , Address Classes}. -@item ADDRESS_TO_POINTER (@var{type}, @var{buf}, @var{addr}) -@findex ADDRESS_TO_POINTER +@item gdbarch_address_to_pointer (@var{current_gdbarch}, @var{type}, @var{buf}, @var{addr}) +@findex gdbarch_address_to_pointer Store in @var{buf} a pointer of type @var{type} representing the address @var{addr}, in the appropriate format for the current architecture. -This macro may safely assume that @var{type} is either a pointer or a +This function may safely assume that @var{type} is either a pointer or a C@t{++} reference type. @xref{Target Architecture Definition, , Pointers Are Not Always Addresses}. -@item BELIEVE_PCC_PROMOTION -@findex BELIEVE_PCC_PROMOTION +@item gdbarch_believe_pcc_promotion (@var{current_gdbarch}) +@findex gdbarch_believe_pcc_promotion Define if the compiler promotes a @code{short} or @code{char} parameter to an @code{int}, but still reports the parameter as its original type, rather than the promoted type. @@ -3282,7 +3281,7 @@ longer than the shortest instruction of the architecture. @code{BREAKPOINT} has been deprecated in favor of -@code{BREAKPOINT_FROM_PC}. +@code{gdbarch_breakpoint_from_pc}. @item BIG_BREAKPOINT @itemx LITTLE_BREAKPOINT @@ -3291,11 +3290,11 @@ Similar to BREAKPOINT, but used for bi-endian targets. @code{BIG_BREAKPOINT} and @code{LITTLE_BREAKPOINT} have been deprecated in -favor of @code{BREAKPOINT_FROM_PC}. +favor of @code{gdbarch_breakpoint_from_pc}. -@item BREAKPOINT_FROM_PC (@var{pcptr}, @var{lenptr}) -@findex BREAKPOINT_FROM_PC -@anchor{BREAKPOINT_FROM_PC} Use the program counter to determine the +@item gdbarch_breakpoint_from_pc (@var{current_gdbarch}, @var{pcptr}, @var{lenptr}) +@findex gdbarch_breakpoint_from_pc +@anchor{gdbarch_breakpoint_from_pc} Use the program counter to determine the contents and size of a breakpoint instruction. It returns a pointer to a string of bytes that encode a breakpoint instruction, stores the length of the string to @code{*@var{lenptr}}, and adjusts the program @@ -3309,22 +3308,21 @@ Replaces all the other @var{BREAKPOINT} macros. -@item MEMORY_INSERT_BREAKPOINT (@var{bp_tgt}) -@itemx MEMORY_REMOVE_BREAKPOINT (@var{bp_tgt}) -@findex MEMORY_REMOVE_BREAKPOINT -@findex MEMORY_INSERT_BREAKPOINT +@item gdbarch_memory_insert_breakpoint (@var{current_gdbarch}, @var{bp_tgt}) +@itemx gdbarch_memory_remove_breakpoint (@var{current_gdbarch}, @var{bp_tgt}) +@findex gdbarch_memory_remove_breakpoint +@findex gdbarch_memory_insert_breakpoint Insert or remove memory based breakpoints. Reasonable defaults (@code{default_memory_insert_breakpoint} and @code{default_memory_remove_breakpoint} respectively) have been -provided so that it is not necessary to define these for most -architectures. Architectures which may want to define -@code{MEMORY_INSERT_BREAKPOINT} and @code{MEMORY_REMOVE_BREAKPOINT} will -likely have instructions that are oddly sized or are not stored in a +provided so that it is not necessary to set these for most +architectures. Architectures which may want to set +@code{gdbarch_memory_insert_breakpoint} and @code{gdbarch_memory_remove_breakpoint} will likely have instructions that are oddly sized or are not stored in a conventional manner. It may also be desirable (from an efficiency standpoint) to define custom breakpoint insertion and removal routines if -@code{BREAKPOINT_FROM_PC} needs to read the target's memory for some +@code{gdbarch_breakpoint_from_pc} needs to read the target's memory for some reason. @item ADJUST_BREAKPOINT_ADDRESS (@var{address}) @@ -3360,35 +3358,35 @@ expectation, @value{GDBN} prints a warning when an adjusted breakpoint is initially set and each time that that breakpoint is hit. -@item CALL_DUMMY_LOCATION -@findex CALL_DUMMY_LOCATION +@item gdbarch_call_dummy_location (@var{current_gdbarch}) +@findex gdbarch_call_dummy_location See the file @file{inferior.h}. This method has been replaced by @code{push_dummy_code} (@pxref{push_dummy_code}). -@item CANNOT_FETCH_REGISTER (@var{regno}) -@findex CANNOT_FETCH_REGISTER +@item gdbarch_cannot_fetch_register (@var{current_gdbarch}, @var{regno}) +@findex gdbarch_cannot_fetch_register A C expression that should be nonzero if @var{regno} cannot be fetched from an inferior process. This is only relevant if @code{FETCH_INFERIOR_REGISTERS} is not defined. -@item CANNOT_STORE_REGISTER (@var{regno}) -@findex CANNOT_STORE_REGISTER +@item gdbarch_cannot_store_register (@var{current_gdbarch}, @var{regno}) +@findex gdbarch_cannot_store_register A C expression that should be nonzero if @var{regno} should not be written to the target. This is often the case for program counters, status words, and other special registers. If this is not defined, @value{GDBN} will assume that all registers may be written. -@item int CONVERT_REGISTER_P(@var{regnum}) -@findex CONVERT_REGISTER_P +@item int gdbarch_convert_register_p (@var{current_gdbarch}, @var{regnum}) +@findex gdbarch_convert_register_p Return non-zero if register @var{regnum} can represent data values in a non-standard form. @xref{Target Architecture Definition, , Using Different Register and Memory Data Representations}. -@item DECR_PC_AFTER_BREAK -@findex DECR_PC_AFTER_BREAK -Define this to be the amount by which to decrement the PC after the +@item gdbarch_decr_pc_after_break (@var{current_gdbarch}) +@findex gdbarch_decr_pc_after_break +Set this to the amount by which to decrement the PC after the program encounters a breakpoint. This is often the number of bytes in @code{BREAKPOINT}, though not always. For most targets this value will be 0. @@ -3420,19 +3418,19 @@ By default, the @samp{info vector} command will print all vector registers (the register's type having the vector attribute). -@item DWARF_REG_TO_REGNUM -@findex DWARF_REG_TO_REGNUM -Convert DWARF register number into @value{GDBN} regnum. If not defined, +@item gdbarch_dwarf_reg_to_regnum (@var{current_gdbarch}) +@findex gdbarch_dwarf_reg_to_regnum +Convert DWARF register number into @value{GDBN} regnum. If not set, no conversion will be performed. -@item DWARF2_REG_TO_REGNUM -@findex DWARF2_REG_TO_REGNUM +@item gdbarch_dwarf2_reg_to_regnum (@var{current_gdbarch}) +@findex gdbarch_dwarf2_reg_to_regnum Convert DWARF2 register number into @value{GDBN} regnum. If not -defined, no conversion will be performed. +set, no conversion will be performed. -@item ECOFF_REG_TO_REGNUM -@findex ECOFF_REG_TO_REGNUM -Convert ECOFF register number into @value{GDBN} regnum. If not defined, +@item gdbarch_ecoff_reg_to_regnum (@var{current_gdbarch}) +@findex gdbarch_ecoff_reg_to_regnum +Convert ECOFF register number into @value{GDBN} regnum. If not set, no conversion will be performed. @item END_OF_TEXT_DEFAULT @@ -3440,8 +3438,8 @@ This is an expression that should designate the end of the text section. @c (? FIXME ?) -@item EXTRACT_RETURN_VALUE(@var{type}, @var{regbuf}, @var{valbuf}) -@findex EXTRACT_RETURN_VALUE +@item gdbarch_extract_return_value (@var{current_gdbarch}, @var{type}, @var{regbuf}, @var{valbuf}) +@findex gdbarch_extract_return_value Define this to extract a function's return value of type @var{type} from the raw register state @var{regbuf} and copy that, in virtual format, into @var{valbuf}. @@ -3534,8 +3532,8 @@ @code{FRAME_FIND_SAVED_REGS} is deprecated. -@item FRAME_NUM_ARGS (@var{fi}) -@findex FRAME_NUM_ARGS +@item gdbarch_frame_num_args (@var{current_gdbarch}, @var{fi}) +@findex gdbarch_frame_num_args For the frame described by @var{fi} return the number of arguments that are being passed. If the number of arguments is not known, return @code{-1}. @@ -3630,8 +3628,8 @@ HPPA's. This should all be ripped out, and a scheme like @file{elfread.c} used instead. -@item GET_LONGJMP_TARGET -@findex GET_LONGJMP_TARGET +@item gdbarch_get_longjmp_target +@findex gdbarch_get_longjmp_target For most machines, this is a target-dependent parameter. On the DECstation and the Iris, this is a native-dependent parameter, since the header file @file{setjmp.h} is needed to define it. @@ -3678,8 +3676,8 @@ This is a C statement that sets the pc of the frame pointed to by @var{prev}. [By default...] -@item INNER_THAN (@var{lhs}, @var{rhs}) -@findex INNER_THAN +@item gdbarch_inner_than (@var{gdbarch}, @var{lhs}, @var{rhs}) +@findex gdbarch_inner_than Returns non-zero if stack address @var{lhs} is inner than (nearer to the stack top) stack address @var{rhs}. Define this as @code{lhs < rhs} if the target's stack grows downward in memory, or @code{lhs > rsh} if the @@ -3706,8 +3704,8 @@ Define this to evaluate to nonzero if the program is stopped in the trampoline that connects to a shared library. -@item IN_SOLIB_RETURN_TRAMPOLINE (@var{pc}, @var{name}) -@findex IN_SOLIB_RETURN_TRAMPOLINE +@item gdbarch_in_solib_trampoline (@var{current_gdbarch}, @var{pc}, @var{name}) +@findex gdbarch_in_solib_trampoline Define this to evaluate to nonzero if the program is stopped in the trampoline that returns from a shared library. @@ -3751,8 +3749,8 @@ @findex NO_HIF_SUPPORT (Specific to the a29k.) -@item POINTER_TO_ADDRESS (@var{type}, @var{buf}) -@findex POINTER_TO_ADDRESS +@item gdbarch_pointer_to_address (@var{current_gdbarch}, @var{type}, @var{buf}) +@findex gdbarch_pointer_to_address Assume that @var{buf} holds a pointer of type @var{type}, in the appropriate format for the current architecture. Return the byte address the pointer refers to. @@ -3763,8 +3761,8 @@ Return non-zero if @var{reg} uses different raw and virtual formats. @xref{Target Architecture Definition, , Raw and Virtual Register Representations}. -@item REGISTER_TO_VALUE(@var{regnum}, @var{type}, @var{from}, @var{to}) -@findex REGISTER_TO_VALUE +@item gdbarch_register_to_value(@var{current_gdbarch}, @var{regnum}, @var{type}, @var{from}, @var{to}) +@findex gdbarch_register_to_value Convert the raw contents of register @var{regnum} into a value of type @var{type}. @xref{Target Architecture Definition, , Using Different Register and Memory Data Representations}. @@ -3881,10 +3879,10 @@ If defined, print information about the load segment for the program counter. (Defined only for the RS/6000.) -@item PC_REGNUM -@findex PC_REGNUM -If the program counter is kept in a register, then define this macro to -be the number (greater than or equal to zero) of that register. +@item gdbarch_pc_regnum (@var{current_gdbarch}) +@findex gdbarch_pc_regnum +If the program counter is kept in a register, then let this function return +the number (greater than or equal to zero) of that register. This should only need to be defined if @code{TARGET_READ_PC} and @code{TARGET_WRITE_PC} are not defined. @@ -3912,10 +3910,10 @@ @findex PROLOGUE_FIRSTLINE_OVERLAP (Only used in unsupported Convex configuration.) -@item PS_REGNUM -@findex PS_REGNUM -If defined, this is the number of the processor status register. (This -definition is only used in generic code when parsing "$ps".) +@item gdbarch_ps_regnum (@var{current_gdbarch} +@findex gdbarch_ps_regnum +If set, this function returns is the number of the processor status register. +(This definition is only used in generic code when parsing "$ps".) @item DEPRECATED_POP_FRAME @findex DEPRECATED_POP_FRAME @@ -3952,11 +3950,11 @@ (@pxref{frame_align}) breakpoint, @var{bp_addr} is set to the address reserved for that breakpoint, and @var{real_pc} set to @var{funaddr}. -This method replaces @code{CALL_DUMMY_LOCATION}, +This method replaces @code{gdbarch_call_dummy_location (@var{current_gdbarch})}, @code{DEPRECATED_REGISTER_SIZE}. -@item REGISTER_NAME(@var{i}) -@findex REGISTER_NAME +@item gdbarch_register_name (@var{current_gdbarch}, @var{i}) +@findex gdbarch_register_name Return the name of register @var{i} as a string. May return @code{NULL} or @code{NUL} to indicate that register @var{i} is not valid. @@ -3976,10 +3974,10 @@ after both the dummy frame and space for parameters/results have been allocated on the stack. @xref{unwind_dummy_id}. -@item SDB_REG_TO_REGNUM -@findex SDB_REG_TO_REGNUM -Define this to convert sdb register numbers into @value{GDBN} regnums. If not -defined, no conversion will be done. +@item gdbarch_sdb_reg_to_regnum (@var{current_gdbarch}) +@findex gdbarch_sdb_reg_to_regnum +Use this function to convert sdb register numbers into @value{GDBN} regnums. +If not set, no conversion will be done. @item enum return_value_convention gdbarch_return_value (struct gdbarch *@var{gdbarch}, struct type *@var{valtype}, struct regcache *@var{regcache}, void *@var{readbuf}, const void *@var{writebuf}) @findex gdbarch_return_value @@ -4034,27 +4032,27 @@ macro does the right thing even when the breakpoint is in the delay slot of a branch or jump. -@item SKIP_PROLOGUE (@var{pc}) -@findex SKIP_PROLOGUE +@item gdbarch_skip_prologue (@var{current_gdbarch}, @var{pc}) +@findex gdbarch_skip_prologue A C expression that returns the address of the ``real'' code beyond the function entry prologue found at @var{pc}. -@item SKIP_TRAMPOLINE_CODE (@var{pc}) -@findex SKIP_TRAMPOLINE_CODE +@item gdbarch_skip_trampoline_code (@var{current_gdbarch}, @var{pc}) +@findex gdbarch_skip_trampoline_code If the target machine has trampoline code that sits between callers and -the functions being called, then define this macro to return a new PC +the functions being called, then set this function to return a new PC that is at the start of the real function. -@item SP_REGNUM -@findex SP_REGNUM -If the stack-pointer is kept in a register, then define this macro to be +@item gdbarch_sp_regnum (@var{current_gdbarch}) +@findex gdbarch_sp_regnum +If the stack-pointer is kept in a register, then use this function to return the number (greater than or equal to zero) of that register, or -1 if there is no such register. -@item STAB_REG_TO_REGNUM -@findex STAB_REG_TO_REGNUM -Define this to convert stab register numbers (as gotten from `r' -declarations) into @value{GDBN} regnums. If not defined, no conversion will be +@item gdbarch_stab_reg_to_regnum (@var{current_gdbarch}) +@findex gdbarch_stab_reg_to_regnum +Use this function to convert stab register numbers (as gotten from `r' +declarations) into @value{GDBN} regnums. If not set, no conversion will be done. @item DEPRECATED_STACK_ALIGN (@var{addr}) @@ -4075,8 +4073,8 @@ slot, @value{GDBN} will single-step over that instruction before resuming normally. Currently only defined for the Mips. -@item STORE_RETURN_VALUE (@var{type}, @var{regcache}, @var{valbuf}) -@findex STORE_RETURN_VALUE +@item gdbarch_store_return_value (@var{current_gdbarch}, @var{type}, @var{regcache}, @var{valbuf}) +@findex gdbarch_store_return_value A C expression that writes the function return value, found in @var{valbuf}, into the @var{regcache}. @var{type} is the type of the value that is to be returned. @@ -4093,8 +4091,8 @@ @findex TARGET_CHAR_BIT Number of bits in a char; defaults to 8. -@item TARGET_CHAR_SIGNED -@findex TARGET_CHAR_SIGNED +@item gdbarch_char_signed (@var{current_gdbarch}) +@findex gdbarch_char_signed Non-zero if @code{char} is normally signed on this architecture; zero if it should be unsigned. @@ -4106,47 +4104,50 @@ @item TARGET_COMPLEX_BIT @findex TARGET_COMPLEX_BIT -Number of bits in a complex number; defaults to @code{2 * TARGET_FLOAT_BIT}. +Number of bits in a complex number; defaults to @code{2 * gdbarch_float_bit + (@var{current_gdbarch})}. At present this macro is not used. -@item TARGET_DOUBLE_BIT -@findex TARGET_DOUBLE_BIT +@item gdbarch_double_bit (@var{current_gdbarch}) +@findex gdbarch_double_bit Number of bits in a double float; defaults to @code{8 * TARGET_CHAR_BIT}. @item TARGET_DOUBLE_COMPLEX_BIT @findex TARGET_DOUBLE_COMPLEX_BIT -Number of bits in a double complex; defaults to @code{2 * TARGET_DOUBLE_BIT}. +Number of bits in a double complex; defaults to @code{2 * gdbarch_double_bit + (@var{current_gdbarch})}. At present this macro is not used. -@item TARGET_FLOAT_BIT -@findex TARGET_FLOAT_BIT +@item gdbarch_float_bit (@var{current_gdbarch}) +@findex gdbarch_float_bit Number of bits in a float; defaults to @code{4 * TARGET_CHAR_BIT}. -@item TARGET_INT_BIT -@findex TARGET_INT_BIT +@item gdbarch_int_bit (@var{current_gdbarch}) +@findex gdbarch_int_bit Number of bits in an integer; defaults to @code{4 * TARGET_CHAR_BIT}. -@item TARGET_LONG_BIT -@findex TARGET_LONG_BIT +@item gdbarch_long_bit (@var{current_gdbarch}) +@findex gdbarch_long_bit Number of bits in a long integer; defaults to @code{4 * TARGET_CHAR_BIT}. -@item TARGET_LONG_DOUBLE_BIT -@findex TARGET_LONG_DOUBLE_BIT +@item gdbarch_long_double_bit (@var{current_gdbarch}) +@findex gdbarch_long_double_bit Number of bits in a long double float; -defaults to @code{2 * TARGET_DOUBLE_BIT}. +defaults to @code{2 * gdbarch_double_bit (@var{current_gdbarch})}. -@item TARGET_LONG_LONG_BIT -@findex TARGET_LONG_LONG_BIT -Number of bits in a long long integer; defaults to @code{2 * TARGET_LONG_BIT}. - -@item TARGET_PTR_BIT -@findex TARGET_PTR_BIT -Number of bits in a pointer; defaults to @code{TARGET_INT_BIT}. +@item gdbarch_long_long_bit (@var{current_gdbarch}) +@findex gdbarch_long_long_bit +Number of bits in a long long integer; defaults to @code{2 * gdbarch_long_bit + (@var{current_gdbarch})}. + +@item gdbarch_ptr_bit (@var{current_gdbarch}) +@findex gdbarch_ptr_bit +Number of bits in a pointer; defaults to @code{gdbarch_int_bit (@var{current_gdbarch})}. -@item TARGET_SHORT_BIT -@findex TARGET_SHORT_BIT +@item gdbarch_short_bit (@var{current_gdbarch}) +@findex gdbarch_short_bit Number of bits in a short integer; defaults to @code{2 * TARGET_CHAR_BIT}. @item TARGET_READ_PC @@ -4185,8 +4186,8 @@ watchpoints. @xref{Algorithms, watchpoints}, for more details and other related macros. -@item TARGET_PRINT_INSN (@var{addr}, @var{info}) -@findex TARGET_PRINT_INSN +@item gdbarch_target_print_insn (@var{current_gdbarch}, @var{addr}, @var{info}) +@findex gdbarch_target_print_insn This is the function used by @value{GDBN} to print an assembly instruction. It prints the instruction at address @var{addr} in debugged memory and returns the length of the instruction, in bytes. If @@ -4218,8 +4219,8 @@ This method has been deprecated in favour of @code{gdbarch_return_value} (@pxref{gdbarch_return_value}). -@item VALUE_TO_REGISTER(@var{type}, @var{regnum}, @var{from}, @var{to}) -@findex VALUE_TO_REGISTER +@item gdbarch_value_to_register(@var{current_gdbarch}, @var{type}, @var{regnum}, @var{from}, @var{to}) +@findex gdbarch_value_to_register Convert a value of type @var{type} into the raw contents of register @var{regnum}'s. @xref{Target Architecture Definition, , Using Different Register and Memory Data Representations}. @@ -4248,8 +4249,8 @@ @item REMOTE_BPT_VECTOR Defaults to @code{1}. -@item NAME_OF_MALLOC -@findex NAME_OF_MALLOC +@item gdbarch_name_of_malloc (@var{current_gdbarch}) +@findex gdbarch_name_of_malloc A string containing the name of the function to call in order to allocate some memory in the inferior. The default value is "malloc". @@ -4873,20 +4874,20 @@ @file{infptrace.c} is included in this configuration, the default routines in @file{infptrace.c} are used for these functions. -@item FP0_REGNUM -@findex FP0_REGNUM -This macro is normally defined to be the number of the first floating +@item gdbarch_fp0_regnum (@var{current_gdbarch}) +@findex gdbarch_fp0_regnum +This functions normally returns the number of the first floating point register, if the machine has such registers. As such, it would appear only in target-specific code. However, @file{/proc} support uses this to decide whether floats are in use on this target. -@item GET_LONGJMP_TARGET -@findex GET_LONGJMP_TARGET +@item gdbarch_get_longjmp_target (@var{current_gdbarch}) +@findex gdbarch_get_longjmp_target For most machines, this is a target-dependent parameter. On the DECstation and the Iris, this is a native-dependent parameter, since @file{setjmp.h} is needed to define it. -This macro determines the target PC address that @code{longjmp} will jump to, +This function determines the target PC address that @code{longjmp} will jump to, assuming that we have just stopped at a longjmp breakpoint. It takes a @code{CORE_ADDR *} as argument, and stores the target PC value through this pointer. It examines the current state of the machine as needed. diff -urN src/gdb/doc/gdb.texinfo dev/gdb/doc/gdb.texinfo --- src/gdb/doc/gdb.texinfo 2007-06-19 05:22:05.000000000 +0200 +++ dev/gdb/doc/gdb.texinfo 2007-06-20 10:49:17.000000000 +0200 @@ -22763,8 +22763,8 @@ Each byte of register data is described by two hex digits. The bytes with the register are transmitted in target byte order. The size of each register and their position within the @samp{g} packet are -determined by the @value{GDBN} internal macros -@code{DEPRECATED_REGISTER_RAW_SIZE} and @code{REGISTER_NAME} macros. The +determined by the @value{GDBN} internal gdbarch functions +@code{DEPRECATED_REGISTER_RAW_SIZE} and @code{gdbarch_register_name}. The specification of several standard @samp{g} packets is specified below. @item E @var{NN} for an error. --------------040600060906090700050007--