From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5354 invoked by alias); 31 May 2007 20:28:04 -0000 Received: (qmail 5334 invoked by uid 22791); 31 May 2007 20:28:00 -0000 X-Spam-Check-By: sourceware.org Received: from mtagate3.de.ibm.com (HELO mtagate3.de.ibm.com) (195.212.29.152) by sourceware.org (qpsmtpd/0.31) with ESMTP; Thu, 31 May 2007 20:27:54 +0000 Received: from d12nrmr1607.megacenter.de.ibm.com (d12nrmr1607.megacenter.de.ibm.com [9.149.167.49]) by mtagate3.de.ibm.com (8.13.8/8.13.8) with ESMTP id l4VKRpc2055078 for ; Thu, 31 May 2007 20:27:51 GMT Received: from d12av02.megacenter.de.ibm.com (d12av02.megacenter.de.ibm.com [9.149.165.228]) by d12nrmr1607.megacenter.de.ibm.com (8.13.8/8.13.8/NCO v8.3) with ESMTP id l4VKRpkm3993824 for ; Thu, 31 May 2007 22:27:51 +0200 Received: from d12av02.megacenter.de.ibm.com (loopback [127.0.0.1]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id l4VKRoY5022178 for ; Thu, 31 May 2007 22:27:51 +0200 Received: from [9.145.148.253] (sig-9-145-148-253.de.ibm.com [9.145.148.253]) by d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id l4VKRlG0022137 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 31 May 2007 22:27:49 +0200 Message-ID: <465F2F73.2030407@de.ibm.com> Date: Thu, 31 May 2007 21:00:00 -0000 From: Markus Deuling User-Agent: Thunderbird 1.5.0.10 (X11/20070301) MIME-Version: 1.0 To: GDB Patches CC: Ulrich Weigand Subject: Re: [rfc] [2/6] Remove macro TARGET_BYTE_ORDER Content-Type: multipart/mixed; boundary="------------080301010607010905060204" Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2007-05/txt/msg00442.txt.bz2 This is a multi-part message in MIME format. --------------080301010607010905060204 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 2684 Hi, it seems that the TARGET_BYTE_ORDER patch was missing some pieces, so that not all appearance of it were replaced. So here is "the rest" of the patch. I run gdb_mbuild.sh and let it build all targets. They were build cleanly. Sorry for the inconvenience. Ok to commit ? ChangeLog: * xtensa-tdep.c (XTENSA_IS_ENTRY,extract_call_winsize) (xtensa_register_write_masked,xtensa_register_read_masked) (xtensa_extract_return_value,xtensa_store_return_value (xtensa_push_dummy_call,xtensa_breakpoint_from_pc): Replace TARGET_BYTE_ORDER by gdbarch_byte_order. * sh-tdep.c (sh_breakpoint_from_pc,gdb_print_insn_sh) (sh_justify_value_in_reg,sh_next_flt_argreg,sh_push_dummy_call_fpu) (sh_extract_return_value_fpu,sh_store_return_value_fpu): Likewise. * sh64-tdep.c (sh64_breakpoint_from_pc,gdb_print_insn_sh64) (sh64_push_dummy_call,sh64_extract_return_value) (sh64_store_return_value,sh64_register_convert_to_virtual) (sh64_register_convert_to_raw,sh64_pseudo_register_read) (sh64_pseudo_register_write,sh64_do_fp_register) (sh64_frame_prev_register): Likewise. * score-tdep.c (score_print_insn,score_breakpoint_from_pc) (score_return_value,score_push_dummy_call,score_fetch_inst): Likewise. * rs6000-tdep.c (rs6000_breakpoint_from_pc,rs6000_push_dummy_call) (e500_move_ev_register,gdb_print_insn_powerpc): Likewise. * remote-m32r-sdi.c (m32r_resume,m32r_wait): Likewise. * ppc-linux-nat.c (store_register): Likewise. * nto-tdep.c (nto_find_and_open_solib) (nto_init_solib_absolute_prefix): Likewise. * mips-tdep.c (mips_pseudo_register_read,mips_pseudo_register_write) (mips_convert_register_p,mips_eabi_push_dummy_call) (mips_n32n64_push_dummy_call,mips_n32n64_return_value) (mips_o32_push_dummy_call,mips_o32_return_value) (mips_o64_push_dummy_call,mips_o64_return_value,mips_o64_return_value) (mips_read_fp_register_single,mips_read_fp_register_double) (mips_print_register,print_gp_register_row,gdb_print_insn_mips) (mips_breakpoint_from_pc): Likewise. * mipsnbsd-tdep.c (mipsnbsd_sigtramp_offset): Likewise. * mips-linux-tdep.c (mips64_supply_fpregset,mips64_fill_fpregset) (mips_linux_o32_sigframe_init): Likewise. * m32r-tdep.c (m32r_memory_insert_breakpoint) (m32r_memory_remove_breakpoint,m32r_breakpoint_from_pc): Likewise. * libunwind-frame.c (libunwind_frame_cache,libunwind_frame_sniffer) (libunwind_sigtramp_frame_sniffer,libunwind_get_reg_special): Likewise. * iq2000-tdep.c (iq2000_breakpoint_from_pc): Likewise. * coffread.c (process_coff_symbol): Likewise. * arm-tdep.c (convert_from_extended,convert_to_extended) (gdb_print_insn_arm): Likewise. -- Markus Deuling GNU Toolchain for Linux on Cell BE deuling@de.ibm.com --------------080301010607010905060204 Content-Type: text/plain; name="diff-remove-TARGET_BYTE_ORDER" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="diff-remove-TARGET_BYTE_ORDER" Content-length: 35796 diff -urN src/gdb/arm-tdep.c dev/gdb/arm-tdep.c --- src/gdb/arm-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/arm-tdep.c 2007-05-31 21:15:22.000000000 +0200 @@ -1470,7 +1470,7 @@ void *dbl) { DOUBLEST d; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) floatformat_to_doublest (&floatformat_arm_ext_big, ptr, &d); else floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword, @@ -1483,7 +1483,7 @@ { DOUBLEST d; floatformat_to_doublest (fmt, ptr, &d); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) floatformat_from_doublest (&floatformat_arm_ext_big, &d, dbl); else floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword, @@ -1954,7 +1954,7 @@ else info->symbols = NULL; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) return print_insn_big_arm (memaddr, info); else return print_insn_little_arm (memaddr, info); diff -urN src/gdb/coffread.c dev/gdb/coffread.c --- src/gdb/coffread.c 2007-01-09 18:58:50.000000000 +0100 +++ dev/gdb/coffread.c 2007-05-31 21:13:51.000000000 +0200 @@ -1559,7 +1559,7 @@ SYMBOL_CLASS (sym) = LOC_ARG; add_symbol_to_list (sym, &local_symbols); #if !defined (BELIEVE_PCC_PROMOTION) - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { /* If PCC says a parameter is a short or a char, aligned on an int boundary, realign it to the diff -urN src/gdb/iq2000-tdep.c dev/gdb/iq2000-tdep.c --- src/gdb/iq2000-tdep.c 2007-01-29 18:31:06.000000000 +0100 +++ dev/gdb/iq2000-tdep.c 2007-05-31 21:13:18.000000000 +0200 @@ -501,7 +501,8 @@ (long) *pcptr); *lenptr = 4; - return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? big_breakpoint + return (gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG) ? big_breakpoint : little_breakpoint; } diff -urN src/gdb/libunwind-frame.c dev/gdb/libunwind-frame.c --- src/gdb/libunwind-frame.c 2007-05-12 02:07:45.000000000 +0200 +++ dev/gdb/libunwind-frame.c 2007-05-31 21:12:18.000000000 +0200 @@ -163,7 +163,8 @@ descr = libunwind_descr (get_frame_arch (next_frame)); acc = descr->accessors; as = unw_create_addr_space_p (acc, - TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? __BIG_ENDIAN : __LITTLE_ENDIAN); @@ -215,7 +216,8 @@ descr = libunwind_descr (get_frame_arch (next_frame)); acc = descr->accessors; as = unw_create_addr_space_p (acc, - TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? __BIG_ENDIAN : __LITTLE_ENDIAN); @@ -372,7 +374,8 @@ descr = libunwind_descr (get_frame_arch (next_frame)); acc = descr->accessors; as = unw_create_addr_space_p (acc, - TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? __BIG_ENDIAN : __LITTLE_ENDIAN); @@ -412,7 +415,8 @@ descr = libunwind_descr (gdbarch); acc = descr->special_accessors; as = unw_create_addr_space_p (acc, - TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? __BIG_ENDIAN : __LITTLE_ENDIAN); diff -urN src/gdb/m32r-tdep.c dev/gdb/m32r-tdep.c --- src/gdb/m32r-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/m32r-tdep.c 2007-05-31 21:10:37.000000000 +0200 @@ -97,7 +97,7 @@ bp_tgt->placed_size = bp_tgt->shadow_len = 4; /* Determine appropriate breakpoint contents and size for this address. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((addr & 3) == 0) { @@ -151,7 +151,7 @@ buf[3] = contents_cache[3]; /* Remove parallel bit. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0) buf[2] &= 0x7f; @@ -175,7 +175,7 @@ gdb_byte *bp; /* Determine appropriate breakpoint. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((*pcptr & 3) == 0) { diff -urN src/gdb/mips-linux-tdep.c dev/gdb/mips-linux-tdep.c --- src/gdb/mips-linux-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/mips-linux-tdep.c 2007-05-31 21:09:14.000000000 +0200 @@ -387,7 +387,8 @@ for (regi = 0; regi < 32; regi++) { const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1)); - if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1)) + if ((gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG) != (regi & 1)) reg_ptr += 4; regcache_raw_supply (regcache, FP0_REGNUM + regi, reg_ptr); } @@ -425,7 +426,8 @@ int regi = regno - FP0_REGNUM; to = (gdb_byte *) (*fpregsetp + (regi & ~1)); - if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1)) + if ((gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG) != (regi & 1)) to += 4; regcache_raw_collect (regcache, regno, to); } @@ -825,7 +827,7 @@ per-frame basis, but right now we don't; the kernel saves eight bytes but we only want four. Use regs_base to access any 64-bit fields. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) regs_base = sigcontext_base + 4; else regs_base = sigcontext_base; @@ -852,7 +854,7 @@ layout, since we can't tell, and it's much more common. Which bits are the "high" bits depends on endianness. */ for (ireg = 0; ireg < 32; ireg++) - if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1)) + if (gdarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1) trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + gdbarch_num_regs (current_gdbarch), diff -urN src/gdb/mipsnbsd-tdep.c dev/gdb/mipsnbsd-tdep.c --- src/gdb/mipsnbsd-tdep.c 2007-05-31 19:20:41.000000000 +0200 +++ dev/gdb/mipsnbsd-tdep.c 2007-05-31 21:06:43.000000000 +0200 @@ -241,8 +241,9 @@ mipsnbsd_sigtramp_offset (struct frame_info *next_frame) { CORE_ADDR pc = frame_pc_unwind (next_frame); - const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG - ? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel; + const char *retcode = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb : + sigtramp_retcode_mipsel; unsigned char ret[RETCODE_SIZE], w[4]; LONGEST off; int i; diff -urN src/gdb/mips-tdep.c dev/gdb/mips-tdep.c --- src/gdb/mips-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/mips-tdep.c 2007-05-31 21:21:46.000000000 +0200 @@ -573,7 +573,7 @@ register_size (gdbarch, cookednum)) { if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p - || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) regcache_raw_read_part (regcache, rawnum, 0, 4, buf); else regcache_raw_read_part (regcache, rawnum, 4, 4, buf); @@ -596,7 +596,7 @@ register_size (gdbarch, cookednum)) { if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p - || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) regcache_raw_write_part (regcache, rawnum, 0, 4, buf); else regcache_raw_write_part (regcache, rawnum, 4, 4, buf); @@ -641,7 +641,7 @@ static int mips_convert_register_p (int regnum, struct type *type) { - return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + return (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && register_size (current_gdbarch, regnum) == 4 && (regnum % gdbarch_num_regs (current_gdbarch)) >= mips_regnum (current_gdbarch)->fp0 @@ -2512,7 +2512,8 @@ making the ABI determination. */ if (len == 8 && mips_abi (gdbarch) == MIPS_ABI_EABI32) { - int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0; + int low_offset = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? 4 : 0; unsigned long regval; /* Write the low word of the double to the even register(s). */ @@ -2576,7 +2577,7 @@ int longword_offset = 0; CORE_ADDR addr; stack_used_p = 1; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if (regsize == 8 && (typecode == TYPE_CODE_INT @@ -2797,7 +2798,7 @@ int longword_offset = 0; CORE_ADDR addr; stack_used_p = 1; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR @@ -2850,7 +2851,7 @@ It does not seem to be necessary to do the same for integral types. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && partial_len < MIPS64_REGSIZE && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) @@ -2911,11 +2912,13 @@ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0, - 8, TARGET_BYTE_ORDER, readbuf, writebuf, 0); + 8, gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0 + 2, - 8, TARGET_BYTE_ORDER, readbuf ? readbuf + 8 : readbuf, + 8, gdbarch_byte_order (current_gdbarch), + readbuf ? readbuf + 8 : readbuf, writebuf ? writebuf + 8 : writebuf, 0); return RETURN_VALUE_REGISTER_CONVENTION; } @@ -2930,7 +2933,8 @@ gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0, TYPE_LENGTH (type), - TARGET_BYTE_ORDER, readbuf, writebuf, 0); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); return RETURN_VALUE_REGISTER_CONVENTION; } else if (TYPE_CODE (type) == TYPE_CODE_STRUCT @@ -2962,7 +2966,8 @@ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + regnum, TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)), - TARGET_BYTE_ORDER, readbuf, writebuf, offset); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; } @@ -3008,7 +3013,8 @@ offset, xfer, regnum); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + regnum, xfer, - TARGET_BYTE_ORDER, readbuf, writebuf, offset); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; } @@ -3125,7 +3131,8 @@ { if (register_size (gdbarch, float_argreg) < 8 && len == 8) { - int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0; + int low_offset = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? 4 : 0; unsigned long regval; /* Write the low word of the double to the even register(s). */ @@ -3276,7 +3283,7 @@ identified as such and GDB gets tweaked accordingly. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && partial_len < MIPS32_REGSIZE && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) @@ -3341,7 +3348,8 @@ gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0, TYPE_LENGTH (type), - TARGET_BYTE_ORDER, readbuf, writebuf, 0); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); return RETURN_VALUE_REGISTER_CONVENTION; } else if (TYPE_CODE (type) == TYPE_CODE_FLT @@ -3352,27 +3360,31 @@ FP0. */ if (mips_debug) fprintf_unfiltered (gdb_stderr, "Return float in $fp1/$fp0\n"); - switch (TARGET_BYTE_ORDER) + switch (gdbarch_byte_order (current_gdbarch)) { case BFD_ENDIAN_LITTLE: mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0 + - 0, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0); + 0, 4, gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0 + 1, - 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4); + 4, gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 4); break; case BFD_ENDIAN_BIG: mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0 + 1, - 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0); + 4, gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0 + 0, - 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4); + 4, gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 4); break; default: internal_error (__FILE__, __LINE__, _("bad switch")); @@ -3410,7 +3422,8 @@ mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + regnum, TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)), - TARGET_BYTE_ORDER, readbuf, writebuf, offset); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; } @@ -3460,7 +3473,8 @@ offset, xfer, regnum); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + regnum, xfer, - TARGET_BYTE_ORDER, readbuf, writebuf, offset); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; } @@ -3606,7 +3620,7 @@ int longword_offset = 0; CORE_ADDR addr; stack_used_p = 1; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((typecode == TYPE_CODE_INT || typecode == TYPE_CODE_PTR @@ -3658,7 +3672,7 @@ It does not seem to be necessary to do the same for integral types. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && partial_len < MIPS64_REGSIZE && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) @@ -3722,7 +3736,8 @@ gdbarch_num_regs (current_gdbarch) + mips_regnum (current_gdbarch)->fp0, TYPE_LENGTH (type), - TARGET_BYTE_ORDER, readbuf, writebuf, 0); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, 0); return RETURN_VALUE_REGISTER_CONVENTION; } else @@ -3743,7 +3758,8 @@ offset, xfer, regnum); mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch) + regnum, xfer, - TARGET_BYTE_ORDER, readbuf, writebuf, offset); + gdbarch_byte_order (current_gdbarch), + readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; } @@ -3809,7 +3825,7 @@ 32 bits. */ int offset; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = 4; else offset = 0; @@ -3848,7 +3864,7 @@ /* mips_read_fp_register_single will find the correct 32 bits from each register. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { mips_read_fp_register_single (frame, regno, rare_buffer + 4); mips_read_fp_register_single (frame, regno + 1, rare_buffer); @@ -3964,7 +3980,7 @@ else fprintf_filtered (file, ": "); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = register_size (current_gdbarch, regnum) - register_size (current_gdbarch, regnum); @@ -4052,7 +4068,7 @@ - register_size (current_gdbarch, regnum)); byte++) printf_filtered (" "); /* Now print the register value in hex, endian order. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) for (byte = register_size (current_gdbarch, regnum) - register_size (current_gdbarch, regnum); @@ -4351,7 +4367,7 @@ info->disassembler_options = "gpr-names=32"; /* Call the appropriate disassembler based on the target endian-ness. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) return print_insn_big_mips (memaddr, info); else return print_insn_little_mips (memaddr, info); @@ -4367,7 +4383,7 @@ static const gdb_byte * mips_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if (mips_pc_is_mips16 (*pcptr)) { diff -urN src/gdb/nto-tdep.c dev/gdb/nto-tdep.c --- src/gdb/nto-tdep.c 2007-05-06 16:30:45.000000000 +0200 +++ dev/gdb/nto-tdep.c 2007-05-31 20:49:56.000000000 +0200 @@ -122,7 +122,8 @@ else { arch = TARGET_ARCHITECTURE->arch_name; - endian = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? "be" : "le"; + endian = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? "be" : "le"; } /* In case nto_root is short, add strlen(solib) @@ -181,7 +182,8 @@ else { arch = TARGET_ARCHITECTURE->arch_name; - endian = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? "be" : "le"; + endian = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? "be" : "le"; } sprintf (arch_path, "%s/%s%s", nto_root, arch, endian); diff -urN src/gdb/ppc-linux-nat.c dev/gdb/ppc-linux-nat.c --- src/gdb/ppc-linux-nat.c 2007-05-06 16:34:38.000000000 +0200 +++ dev/gdb/ppc-linux-nat.c 2007-05-31 20:48:55.000000000 +0200 @@ -654,12 +654,12 @@ memset (buf, 0, sizeof buf); bytes_to_transfer = align_up (register_size (current_gdbarch, regno), sizeof (long)); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) { /* Little-endian values always sit at the left end of the buffer. */ regcache_raw_collect (regcache, regno, buf); } - else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { /* Big-endian values sit at the right end of the buffer. */ size_t padding = (bytes_to_transfer diff -urN src/gdb/remote-m32r-sdi.c dev/gdb/remote-m32r-sdi.c --- src/gdb/remote-m32r-sdi.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/remote-m32r-sdi.c 2007-05-31 20:48:16.000000000 +0200 @@ -475,7 +475,7 @@ else { buf[0] = SDI_WRITE_MEMORY; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) store_long_parameter (buf + 1, pc_addr); else store_long_parameter (buf + 1, pc_addr - 1); @@ -515,7 +515,7 @@ continue; /* Set PBP. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4, 0x00000006); else @@ -542,7 +542,7 @@ store_long_parameter (buf + 5, 4); if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc)) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { buf[9] = dbt_bp_entry[0]; buf[10] = dbt_bp_entry[1]; @@ -559,7 +559,7 @@ } else { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((bp_addr & 2) == 0) { @@ -606,7 +606,7 @@ continue; /* DBC register */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { switch (ab_type[i]) { @@ -747,7 +747,7 @@ if (last_pc_addr != 0xffffffff) { buf[0] = SDI_WRITE_MEMORY; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) store_long_parameter (buf + 1, last_pc_addr); else store_long_parameter (buf + 1, last_pc_addr - 1); @@ -776,7 +776,7 @@ address, we have to take care of it later. */ if ((pc_addr & 0x2) != 0) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((bp_data[i][2] & 0x80) != 0) { @@ -838,7 +838,7 @@ c = serial_readchar (sdi_desc, SDI_TIMEOUT); if (c != '-' && recv_data (buf, 4) != -1) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if ((buf[3] & 0x1) == 0x1) hit_watchpoint_addr = ab_address[i]; diff -urN src/gdb/rs6000-tdep.c dev/gdb/rs6000-tdep.c --- src/gdb/rs6000-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/rs6000-tdep.c 2007-05-31 21:23:28.000000000 +0200 @@ -702,7 +702,7 @@ static unsigned char big_breakpoint[] = { 0x7d, 0x82, 0x10, 0x08 }; static unsigned char little_breakpoint[] = { 0x08, 0x10, 0x82, 0x7d }; *bp_size = 4; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) return big_breakpoint; else return little_breakpoint; @@ -1683,7 +1683,8 @@ else { /* Argument can fit in one register. No problem. */ - int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0; + int adj = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? reg_size - len : 0; gdb_byte word[MAX_REGISTER_SIZE]; memset (word, 0, reg_size); @@ -2220,7 +2221,7 @@ reg_index = ev_reg - tdep->ppc_ev0_regnum; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { move (regcache, tdep->ppc_ev0_upper_regnum + reg_index, byte_buffer); move (regcache, tdep->ppc_gp0_regnum + reg_index, byte_buffer + 4); @@ -3026,7 +3027,7 @@ if (!info->disassembler_options) info->disassembler_options = "any"; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) return print_insn_big_powerpc (memaddr, info); else return print_insn_little_powerpc (memaddr, info); diff -urN src/gdb/score-tdep.c dev/gdb/score-tdep.c --- src/gdb/score-tdep.c 2007-05-17 05:15:42.000000000 +0200 +++ dev/gdb/score-tdep.c 2007-05-31 20:44:03.000000000 +0200 @@ -316,7 +316,7 @@ static int score_print_insn (bfd_vma memaddr, struct disassemble_info *info) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) return print_insn_big_score (memaddr, info); else return print_insn_little_score (memaddr, info); @@ -336,7 +336,7 @@ } raw = extract_unsigned_integer (buf, SCORE_INSTLEN); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if (!(raw & 0x80008000)) { @@ -434,7 +434,8 @@ int xfer = SCORE_REGSIZE; if (offset + xfer > TYPE_LENGTH (type)) xfer = TYPE_LENGTH (type) - offset; - score_xfer_register (regcache, regnum, xfer, TARGET_BYTE_ORDER, + score_xfer_register (regcache, regnum, xfer, + gdbarch_byte_order (current_gdbarch), readbuf, writebuf, offset); } return RETURN_VALUE_REGISTER_CONVENTION; @@ -544,7 +545,7 @@ Where X is a hole. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION) && argreg > SCORE_LAST_ARG_REGNUM @@ -557,8 +558,8 @@ ULONGEST regval = extract_unsigned_integer (val, partial_len); /* The last part of a arg should shift left when - TARGET_BYTE_ORDER is BFD_ENDIAN_BIG. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG + gdbarch_byte_order is BFD_ENDIAN_BIG. */ + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG && arg_last_part_p == 1 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) @@ -668,7 +669,7 @@ inst.raw = extract_unsigned_integer (buf, SCORE_INSTLEN); inst.is15 = !(inst.raw & 0x80008000); inst.v = RM_PBITS (inst.raw); - big = (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG); + big = (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG); if (inst.is15) { if (big ^ ((addr & 0x2) == 2)) diff -urN src/gdb/sh64-tdep.c dev/gdb/sh64-tdep.c --- src/gdb/sh64-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/sh64-tdep.c 2007-05-31 21:25:49.000000000 +0200 @@ -267,7 +267,7 @@ which translates in big endian mode to 0x0, 0x3b and in little endian mode to 0x3b, 0x0*/ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { if (pc_is_isa32 (*pcptr)) { @@ -682,7 +682,7 @@ static int gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info) { - info->endian = TARGET_BYTE_ORDER; + info->endian = gdbarch_byte_order (current_gdbarch); return print_insn_sh (memaddr, info); } @@ -1104,7 +1104,7 @@ if (len < argreg_size) { /* value gets right-justified in the register or stack word */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) memcpy (valbuf + argreg_size - len, (char *) value_contents (args[argnum]), len); else @@ -1232,7 +1232,7 @@ regcache_cooked_read (regcache, DR0_REGNUM, buf); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword, buf, &val); else @@ -1251,7 +1251,7 @@ at the most significant end. */ regcache_raw_read (regcache, DEFAULT_RETURN_REGNUM, buf); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = register_size (current_gdbarch, DEFAULT_RETURN_REGNUM) - len; else @@ -1281,7 +1281,7 @@ { int i, regnum = FP0_REGNUM; for (i = 0; i < len; i += 4) - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) regcache_raw_write (regcache, regnum++, (char *) valbuf + len - 4 - i); else @@ -1296,7 +1296,7 @@ { /* Pad with zeros. */ memset (buf, 0, register_size (current_gdbarch, return_register)); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) offset = 0; /*register_size (current_gdbarch, return_register) - len;*/ else @@ -1527,7 +1527,7 @@ sh64_register_convert_to_virtual (int regnum, struct type *type, char *from, char *to) { - if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE) { /* It is a no-op. */ memcpy (to, from, register_size (current_gdbarch, regnum)); @@ -1552,7 +1552,7 @@ sh64_register_convert_to_raw (struct type *type, int regnum, const void *from, void *to) { - if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE) { /* It is a no-op. */ memcpy (to, from, register_size (current_gdbarch, regnum)); @@ -1637,7 +1637,7 @@ /* Build the value in the provided buffer. */ regcache_raw_read (regcache, base_regnum, temp_buffer); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = 4; memcpy (buffer, temp_buffer + offset, 4); /* get LOWER 32 bits only????*/ } @@ -1797,7 +1797,7 @@ { base_regnum = sh64_compact_reg_base_num (reg_nr); /* reg_nr is 32 bit here, and base_regnum is 64 bits. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = 4; else offset = 0; @@ -1988,8 +1988,9 @@ fprintf_filtered (file, "\t(raw 0x"); for (j = 0; j < register_size (gdbarch, regnum); j++) { - int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j - : register_size (gdbarch, regnum) - 1 - j; + int idx = gdbarch_byte_order (current_gdbarch) + == BFD_ENDIAN_BIG ? j : register_size + (gdbarch, regnum) - 1 - j; fprintf_filtered (file, "%02x", raw_buffer[idx]); } fprintf_filtered (file, ")"); @@ -2336,7 +2337,7 @@ if (valuep) { memset (valuep, 0, reg_size); - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) read_memory (*addrp, valuep, size); else read_memory (*addrp, (char *) valuep + reg_size - size, size); diff -urN src/gdb/sh-tdep.c dev/gdb/sh-tdep.c --- src/gdb/sh-tdep.c 2007-05-06 21:37:30.000000000 +0200 +++ dev/gdb/sh-tdep.c 2007-05-31 20:37:25.000000000 +0200 @@ -395,7 +395,7 @@ static unsigned char big_remote_breakpoint[] = { 0xc3, 0x20 }; static unsigned char little_remote_breakpoint[] = { 0x20, 0xc3 }; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { *lenptr = sizeof (big_remote_breakpoint); return big_remote_breakpoint; @@ -502,7 +502,7 @@ static int gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info) { - info->endian = TARGET_BYTE_ORDER; + info->endian = gdbarch_byte_order (current_gdbarch); return print_insn_sh (memaddr, info); } @@ -895,7 +895,7 @@ if (len < 4) { /* value gets right-justified in the register or stack word */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) memcpy (valbuf + (4 - len), (char *) value_contents (val), len); else memcpy (valbuf, (char *) value_contents (val), len); @@ -968,7 +968,7 @@ /* Also mark the next register as used. */ flt_argreg_array[argreg + 1] = 1; } - else if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) { /* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */ if (!flt_argreg_array[argreg + 1]) @@ -1106,7 +1106,7 @@ register, increments the val and len values accordingly and then proceeds as normal by writing the second 32 bits into the next register. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE && TYPE_LENGTH (type) == 2 * reg_size) { regcache_cooked_write_unsigned (regcache, flt_argreg + 1, @@ -1247,7 +1247,7 @@ int len = TYPE_LENGTH (type); int i, regnum = FP0_REGNUM; for (i = 0; i < len; i += 4) - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) regcache_raw_read (regcache, regnum++, (char *) valbuf + len - 4 - i); else regcache_raw_read (regcache, regnum++, (char *) valbuf + i); @@ -1291,7 +1291,7 @@ int len = TYPE_LENGTH (type); int i, regnum = FP0_REGNUM; for (i = 0; i < len; i += 4) - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) regcache_raw_write (regcache, regnum++, (char *) valbuf + len - 4 - i); else diff -urN src/gdb/xtensa-tdep.c dev/gdb/xtensa-tdep.c --- src/gdb/xtensa-tdep.c 2007-05-31 19:31:37.000000000 +0200 +++ dev/gdb/xtensa-tdep.c 2007-05-31 20:33:51.000000000 +0200 @@ -109,7 +109,8 @@ indicates that the instruction is an ENTRY instruction. */ #define XTENSA_IS_ENTRY(op1) \ - ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? ((op1) == 0x6c) : ((op1) == 0x36)) + ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) \ + ? ((op1) == 0x6c) : ((op1) == 0x36)) #define XTENSA_ENTRY_LENGTH 3 @@ -159,7 +160,7 @@ /* Lookup call insn. (Return the default value (4) if we can't find a valid call insn. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) { if (((insn & 0xf) == 0x5) || ((insn & 0xcf) == 0xc0)) winsize = (insn & 0x30) >> 2; /* 0, 4, 8, 12 */ @@ -332,7 +333,7 @@ DEBUGTRACE ("xtensa_register_write_masked ()\n"); /* Copy the masked register to host byte-order. */ - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) for (i = 0; i < bytesize; i++) { mem >>= 8; @@ -452,7 +453,7 @@ ptr = value; mem = *ptr; - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) for (i = 0; i < bytesize; i++) { if ((i & 3) == 0) @@ -1172,7 +1173,7 @@ DEBUGINFO ("[xtensa_extract_return_value] areg %d len %d\n", areg, len); - if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = 4 - len; for (; len > 0; len -= 4, areg++, valbuf += 4) @@ -1211,7 +1212,7 @@ DEBUGTRACE ("[xtensa_store_return_value] callsize %d wb %d\n", callsize, (int) wb); - if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset = 4 - len; areg = AREG_NUMBER (A2_REGNUM + callsize, wb); @@ -1428,7 +1429,8 @@ word in big-endian mode and require a shift. This only applies for structures smaller than one word. */ - if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (n < REGISTER_SIZE + && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) offset += (REGISTER_SIZE - n); write_memory (offset, info->contents, info->length); @@ -1446,7 +1448,8 @@ than REGISTER_SIZE; for larger odd-sized structures the excess will be left-aligned in the register on both endiannesses. */ - if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (n < REGISTER_SIZE + && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE); v = v >> ((REGISTER_SIZE - n) * TARGET_CHAR_BIT); @@ -1511,7 +1514,7 @@ if (ISA_USE_DENSITY_INSTRUCTIONS) { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { *lenptr = sizeof (density_big_breakpoint); return density_big_breakpoint; @@ -1524,7 +1527,7 @@ } else { - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { *lenptr = sizeof (big_breakpoint); return big_breakpoint; --------------080301010607010905060204--