From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26832 invoked by alias); 16 Nov 2005 16:23:41 -0000 Received: (qmail 26818 invoked by uid 22791); 16 Nov 2005 16:23:38 -0000 Received: from fra-del-02.spheriq.net (HELO fra-del-02.spheriq.net) (195.46.51.98) by sourceware.org (qpsmtpd/0.30-dev) with ESMTP; Wed, 16 Nov 2005 16:23:38 +0000 Received: from fra-out-02.spheriq.net (fra-out-02.spheriq.net [195.46.51.130]) by fra-del-02.spheriq.net with ESMTP id jAGGNXuW005567 for ; Wed, 16 Nov 2005 16:23:33 GMT Received: from fra-cus-01.spheriq.net (fra-cus-01.spheriq.net [195.46.51.37]) by fra-out-02.spheriq.net with ESMTP id jAGGNVjp006093 for ; Wed, 16 Nov 2005 16:23:31 GMT Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by fra-cus-01.spheriq.net with ESMTP id jAGGNSm8014391 (version=TLSv1/SSLv3 cipher=EDH-RSA-DES-CBC3-SHA bits=168 verify=OK) for ; Wed, 16 Nov 2005 16:23:30 GMT Received: from zeta.dmz-eu.st.com (ns2.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3161CDA44 for ; Wed, 16 Nov 2005 16:23:24 +0000 (GMT) Received: by zeta.dmz-eu.st.com (STMicroelectronics, from userid 60012) id E7AB7475A8; Wed, 16 Nov 2005 16:26:22 +0000 (GMT) Received: from zeta.dmz-eu.st.com (localhost [127.0.0.1]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A20BC75969 for ; Wed, 16 Nov 2005 16:26:22 +0000 (UTC) Received: from mail1.bri.st.com (mail1.bri.st.com [164.129.8.218]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 79FBF475B2 for ; Wed, 16 Nov 2005 16:26:21 +0000 (GMT) Received: from [164.129.15.13] (terrorhawk.bri.st.com [164.129.15.13]) by mail1.bri.st.com (MOS 3.5.8-GR) with ESMTP id CGZ38663 (AUTH "andrew stubbs"); Wed, 16 Nov 2005 16:23:20 GMT Message-ID: <437B5C5F.5080500@st.com> Date: Wed, 16 Nov 2005 17:09:00 -0000 From: Andrew STUBBS User-Agent: Mozilla Thunderbird 1.0.2 (Windows/20050317) MIME-Version: 1.0 To: gdb-patches@sources.redhat.com Subject: [PATCH][SH] invalid registers Content-Type: multipart/mixed; boundary="------------030400060205010002000805" X-O-Spoofed: Not Scanned X-O-General-Status: No X-O-Spam1-Status: Not Scanned X-O-Spam2-Status: Not Scanned X-O-URL-Status: Not Scanned X-O-Virus1-Status: No X-O-Virus2-Status: Not Scanned X-O-Virus3-Status: No X-O-Virus4-Status: No X-O-Virus5-Status: Not Scanned X-O-Image-Status: Not Scanned X-O-Attach-Status: Not Scanned X-SpheriQ-Ver: 4.1.07 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2005-11/txt/msg00236.txt.bz2 This is a multi-part message in MIME format. --------------030400060205010002000805 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 507 Hi, The attached patch teaches GDB which registers are invalid in previous frames when the CFI does not say otherwise. It does this using the SH4 ABI. This is backwards compatible with the sh1-sh3 and variants. I have not attempted to deal with the DSP registers as I don't know the ABI. They will be treated as ever. The only thing this patch actually does is allow the 'info registers' command (and friends) to show '*invalid register*' when there is no way to know the true value. Andrew Stubbs --------------030400060205010002000805 Content-Type: text/plain; name="invalid-registers.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="invalid-registers.patch" Content-length: 3226 2005-11-16 Andrew Stubbs * sh-tdep.c (sh_dwarf2_frame_init_reg): New function. (sh_gdbarch_init): Call dwarf2_frame_set_init_reg(). Index: src/gdb/sh-tdep.c =================================================================== --- src.orig/gdb/sh-tdep.c 2005-11-04 16:57:00.000000000 +0000 +++ src/gdb/sh-tdep.c 2005-11-04 17:55:46.000000000 +0000 @@ -2118,6 +2118,57 @@ sh_sh2a_register_sim_regno (int nr) return legacy_register_sim_regno (nr); } +/* Set up the register unwinding such that call-clobbered registers are + not displayed in frames >0 because the true value is not certain. + The 'undefined' registers will show up as 'not available' unless the + CFI says otherwise. + + This function is currently set up for SH4 and compatible only. */ + +static void +sh_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, + struct dwarf2_frame_state_reg *reg) +{ + /* Mark the PC as the destination for the return address. */ + if (regnum == PC_REGNUM) + reg->how = DWARF2_FRAME_REG_RA; + + /* Mark the stack pointer as the call frame address. */ + else if (regnum == SP_REGNUM) + reg->how = DWARF2_FRAME_REG_CFA; + + /* The above was taken from the default init_reg in dwarf2-frame.c + while the below is SH specific. */ + + /* Caller save registers. */ + else if ((regnum >= R0_REGNUM && regnum <= R0_REGNUM+7) + || (regnum >= FR0_REGNUM && regnum <= FR0_REGNUM+11) + || (regnum >= DR0_REGNUM && regnum <= DR0_REGNUM+5) + || (regnum >= FV0_REGNUM && regnum <= FV0_REGNUM+2) + || (regnum == MACH_REGNUM) + || (regnum == MACL_REGNUM) + || (regnum == FPUL_REGNUM) + || (regnum == SR_REGNUM)) + reg->how = DWARF2_FRAME_REG_UNDEFINED; + + /* Callee save registers. */ + else if ((regnum >= R0_REGNUM+8 && regnum <= R0_REGNUM+15) + || (regnum >= FR0_REGNUM+12 && regnum <= FR0_REGNUM+15) + || (regnum >= DR0_REGNUM+6 && regnum <= DR0_REGNUM+8) + || (regnum == FV0_REGNUM+3)) + reg->how = DWARF2_FRAME_REG_SAME_VALUE; + + /* Other registers. These are not in the ABI and may or may not + mean anything in frames >0 so don't show them. */ + else if ((regnum >= R0_BANK0_REGNUM && regnum <= R0_BANK0_REGNUM+15) + || (regnum == GBR_REGNUM) + || (regnum == VBR_REGNUM) + || (regnum == FPSCR_REGNUM) + || (regnum == SSR_REGNUM) + || (regnum == SPC_REGNUM)) + reg->how = DWARF2_FRAME_REG_UNDEFINED; +} + static struct sh_frame_cache * sh_alloc_frame_cache (void) { @@ -2502,6 +2553,8 @@ sh_gdbarch_init (struct gdbarch_info inf set_gdbarch_in_function_epilogue_p (gdbarch, sh_in_function_epilogue_p); + dwarf2_frame_set_init_reg (gdbarch, sh_dwarf2_frame_init_reg); + switch (info.bfd_arch_info->mach) { case bfd_mach_sh: Index: src/gdb/sh-tdep.h =================================================================== --- src.orig/gdb/sh-tdep.h 2004-10-06 09:55:36.000000000 +0100 +++ src/gdb/sh-tdep.h 2005-11-04 17:50:17.000000000 +0000 @@ -41,6 +41,7 @@ enum FPUL_REGNUM = 23, /* Floating point registers */ FPSCR_REGNUM = 24, + FR0_REGNUM = 25, FLOAT_ARG0_REGNUM = 29, FLOAT_ARGLAST_REGNUM = 36, FP_LAST_REGNUM = 40, --------------030400060205010002000805--