From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2014 invoked by alias); 24 Aug 2004 20:58:18 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 2006 invoked from network); 24 Aug 2004 20:58:17 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 24 Aug 2004 20:58:17 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i7OKwHS2005463 for ; Tue, 24 Aug 2004 16:58:17 -0400 Received: from localhost.redhat.com (porkchop.devel.redhat.com [172.16.58.2]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i7OKwGa04084; Tue, 24 Aug 2004 16:58:16 -0400 Received: from gnu.org (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 0B3BE2B9D; Tue, 24 Aug 2004 16:57:08 -0400 (EDT) Message-ID: <412BABA3.7020300@gnu.org> Date: Tue, 24 Aug 2004 20:58:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-GB; rv:1.4.1) Gecko/20040801 MIME-Version: 1.0 To: Alexandre Oliva Cc: gdb-patches@sources.redhat.com Subject: Re: introduce SH 2a simulator References: In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2004-08/txt/msg00673.txt.bz2 Can you revise the ChangeLogs as follows: > Index: include/gdb/ChangeLog > from Alexandre Oliva > > 2004-02-13 Michael Snyder > * sim-sh.h: Add new sh2a banked registers. Write this as YYYY-MM-DD Michael Snyder .... Committed by .... * change. Rewrite the below as: YYYY-MM-DD Michael Snyder .... Committed by ... * final set of changes instead of a long winded change history. and repost. Andrew > Index: sim/sh/ChangeLog > from Alexandre Oliva > > Introduce SH2a support. > 2004-02-13 Michael Snyder > * interp.c (sim_fetch_register, sim_store_register): > Revert overloading of tbr and ibnr onto ssr and spc. > Implement proper handling of tbr and bank registers. > 2004-02-12 Michael Snyder > * gencode.c, interp.c: Revert the splitting of the jump table > into two pieces. Instead, change it from char to short. > 2004-02-11 Michael Snyder > * gencode.c (op tab): Implement ldbank, stbank, and resbank. > * interp.c (saved_state): Add ibnr and ibcr. Move bfd_mach > to end of struct. Add regstack pointer. > (IBNR, IBCR, BANKN, ME, SET_BANKN, SET_ME): New macros. > (init_dsp): Allocate space for 512 register banks. > (sim_store_register, sim_fetch_register): For now, overload > tbr and ibnr onto ssr and spc. > (trap): For now, use trap #13 and trap #14 to set ibnr and ibcr. > 2004-02-05 Michael Snyder > * gencode.c (op tab): Implement rtv/n, mulr, divs, and divu. > 2004-01-30 Michael Snyder > * gencode.c (op tab): Implement clips, clipu. > * interp.c (union saved_state_type): Add BO, CS. > 2004-01-29 Michael Snyder > * gencode.c (op tab): Implement movmu, movml. > (gensim_caselist): Add tokens for r15 and multiple regs. > 2004-01-27 Michael Snyder > * gencode.c (op tab): Implement nott, movrt, movu, > long versions of mov. Add mov.l @-,R0. > (gensim_caselist): Add defaults to switch statements. > * interp.c (do_long_move_insn): New function. > 2004-01-21 Michael Snyder > * gencode.c (op tab): Implement movi20 and movi20s. > Implement mov.b and mov.w with disp12. > 2004-01-20 Michael Snyder > * gencode.c (op tab): Implement mov.l with 12-bit displacement. > 2004-01-16 Michael Snyder > * gencode.c (op tab): Implement fmov.[sd] with 12-bit displacement. > * gencode.c (op tab): Implement bset/bclr. > 2004-01-15 Michael Snyder > * gencode.c (op tab): Implement bit manipulation insns. > Implement jsr/n. Turn on implementations of remaining > 16-bit sh2a insns. > * interp.c (do_blog_insn): Implement binary logic insns. > 2004-01-14 Michael Snyder > * gencode.c (conflict_warn, warn_conflicts): Temporary debugging. > 2004-01-13 Michael Snyder > * gencode.c: Move movx/movy insns into separate switch > statement (thereby freeing space in the 8-bit opcode table). > (filltable): Make index auto instead of static. > (gensim_caselist): Generate default case here instead of in caller. > (gensim): Generate two separate switch statements. Call > gensim_caselist once for each (for movsxy_tab and for tab). > * interp.c (init_dsp): Don't swap contents of sh_dsp_table > any more. Instead use it directly in its own switch statement. > 2004-01-09 Michael Snyder > * interp.c (sim_load): Save the bfd machine code. > (sim_create_inferior): Ditto. > * gencode.c (op tab): If machine == sh2a, reject instructions > that are disabled on that chip. > * interp.c (union saved_state_type): Add tbr register. > * gencode.c (op tab): Add some new sh2a insns. >