From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23138 invoked by alias); 3 Aug 2004 01:15:21 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 23131 invoked from network); 3 Aug 2004 01:15:21 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 3 Aug 2004 01:15:21 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i731FLe3030888 for ; Mon, 2 Aug 2004 21:15:21 -0400 Received: from localhost.redhat.com (porkchop.devel.redhat.com [172.16.58.2]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i731FKa11662; Mon, 2 Aug 2004 21:15:20 -0400 Received: from gnu.org (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 41AFD2B9D; Mon, 2 Aug 2004 21:15:13 -0400 (EDT) Message-ID: <410EE721.1020506@gnu.org> Date: Tue, 03 Aug 2004 01:15:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-GB; rv:1.4.1) Gecko/20040801 MIME-Version: 1.0 To: cgd@broadcom.com Cc: gdb-patches@sources.redhat.com Subject: [commit] s/mips{16,32}/mips_insn{16,32}; Was: [commit] Split MIPS unwinder three ways; partly References: <410D4198.3040908@gnu.org> <410E6B28.5080908@gnu.org> <410E8A4B.9080902@gnu.org> In-Reply-To: Content-Type: multipart/mixed; boundary="------------090601080500090401080506" X-SW-Source: 2004-08/txt/msg00053.txt.bz2 This is a multi-part message in MIME format. --------------090601080500090401080506 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Content-length: 288 > At Mon, 02 Aug 2004 14:39:07 -0400, Andrew Cagney wrote: > >>> I'd rather have the code clearly scream its intent: >>> >>> mips_insn32_ >>> mips_insn16_ > > > that seems reasonable to me. done. tempted by the chance to rewrite any of those unwinders from scratch? :-) Andrew --------------090601080500090401080506 Content-Type: text/plain; name="diffs" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="diffs" Content-length: 8338 2004-08-02 Andrew Cagney * mips-tdep.c (mips_gdbarch_init, mips_insn16_frame_cache) (mips_insn16_frame_this_id, mips_insn16_frame_prev_register) (mips_insn16_frame_unwind, mips_insn16_frame_sniffer) (mips_insn16_frame_base_address, mips_insn16_frame_base) (mips_insn16_frame_base_sniffer, mips_insn32_frame_cache) (mips_insn32_frame_this_id, mips_insn32_frame_prev_register) (mips_insn32_frame_unwind, mips_insn32_frame_sniffer) (mips_insn32_frame_base_address, mips_insn32_frame_base) (mips_insn32_frame_base_sniffer): Replace mips16 / mips32 prefix with mips_insn16 and mips_insn32. Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.308 diff -p -u -r1.308 mips-tdep.c --- mips-tdep.c 1 Aug 2004 18:47:58 -0000 1.308 +++ mips-tdep.c 3 Aug 2004 01:11:54 -0000 @@ -1778,8 +1778,12 @@ mips_mdebug_frame_base_sniffer (struct f return NULL; } +/* Heuristic unwinder for 16-bit MIPS instruction set (aka MIPS16). + Procedures that use the 32-bit instruction set are handled by the + mips_insn32 unwinder. */ + static struct mips_frame_cache * -mips16_frame_cache (struct frame_info *next_frame, void **this_cache) +mips_insn16_frame_cache (struct frame_info *next_frame, void **this_cache) { mips_extra_func_info_t proc_desc; struct mips_frame_cache *cache; @@ -1963,71 +1967,76 @@ mips16_frame_cache (struct frame_info *n } static void -mips16_frame_this_id (struct frame_info *next_frame, void **this_cache, +mips_insn16_frame_this_id (struct frame_info *next_frame, void **this_cache, struct frame_id *this_id) { - struct mips_frame_cache *info = mips16_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn16_frame_cache (next_frame, this_cache); (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame)); } static void -mips16_frame_prev_register (struct frame_info *next_frame, +mips_insn16_frame_prev_register (struct frame_info *next_frame, void **this_cache, int regnum, int *optimizedp, enum lval_type *lvalp, CORE_ADDR *addrp, int *realnump, void *valuep) { - struct mips_frame_cache *info = mips16_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn16_frame_cache (next_frame, this_cache); trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, optimizedp, lvalp, addrp, realnump, valuep); } -static const struct frame_unwind mips16_frame_unwind = +static const struct frame_unwind mips_insn16_frame_unwind = { NORMAL_FRAME, - mips16_frame_this_id, - mips16_frame_prev_register + mips_insn16_frame_this_id, + mips_insn16_frame_prev_register }; static const struct frame_unwind * -mips16_frame_sniffer (struct frame_info *next_frame) +mips_insn16_frame_sniffer (struct frame_info *next_frame) { CORE_ADDR pc = frame_pc_unwind (next_frame); if (pc_is_mips16 (pc)) - return &mips16_frame_unwind; + return &mips_insn16_frame_unwind; return NULL; } static CORE_ADDR -mips16_frame_base_address (struct frame_info *next_frame, +mips_insn16_frame_base_address (struct frame_info *next_frame, void **this_cache) { - struct mips_frame_cache *info = mips16_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn16_frame_cache (next_frame, this_cache); return info->base; } -static const struct frame_base mips16_frame_base = +static const struct frame_base mips_insn16_frame_base = { - &mips16_frame_unwind, - mips16_frame_base_address, - mips16_frame_base_address, - mips16_frame_base_address + &mips_insn16_frame_unwind, + mips_insn16_frame_base_address, + mips_insn16_frame_base_address, + mips_insn16_frame_base_address }; static const struct frame_base * -mips16_frame_base_sniffer (struct frame_info *next_frame) +mips_insn16_frame_base_sniffer (struct frame_info *next_frame) { - if (mips16_frame_sniffer (next_frame) != NULL) - return &mips16_frame_base; + if (mips_insn16_frame_sniffer (next_frame) != NULL) + return &mips_insn16_frame_base; else return NULL; } +/* Heuristic unwinder for procedures using 32-bit instructions (covers + both 32-bit and 64-bit MIPS ISAs). Procedures using 16-bit + instructions (a.k.a. MIPS16) are handled by the mips_insn16 + unwinder. */ + static struct mips_frame_cache * -mips32_frame_cache (struct frame_info *next_frame, void **this_cache) +mips_insn32_frame_cache (struct frame_info *next_frame, void **this_cache) { mips_extra_func_info_t proc_desc; struct mips_frame_cache *cache; @@ -2211,65 +2220,65 @@ mips32_frame_cache (struct frame_info *n } static void -mips32_frame_this_id (struct frame_info *next_frame, void **this_cache, +mips_insn32_frame_this_id (struct frame_info *next_frame, void **this_cache, struct frame_id *this_id) { - struct mips_frame_cache *info = mips32_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn32_frame_cache (next_frame, this_cache); (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame)); } static void -mips32_frame_prev_register (struct frame_info *next_frame, +mips_insn32_frame_prev_register (struct frame_info *next_frame, void **this_cache, int regnum, int *optimizedp, enum lval_type *lvalp, CORE_ADDR *addrp, int *realnump, void *valuep) { - struct mips_frame_cache *info = mips32_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn32_frame_cache (next_frame, this_cache); trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, optimizedp, lvalp, addrp, realnump, valuep); } -static const struct frame_unwind mips32_frame_unwind = +static const struct frame_unwind mips_insn32_frame_unwind = { NORMAL_FRAME, - mips32_frame_this_id, - mips32_frame_prev_register + mips_insn32_frame_this_id, + mips_insn32_frame_prev_register }; static const struct frame_unwind * -mips32_frame_sniffer (struct frame_info *next_frame) +mips_insn32_frame_sniffer (struct frame_info *next_frame) { CORE_ADDR pc = frame_pc_unwind (next_frame); if (! pc_is_mips16 (pc)) - return &mips32_frame_unwind; + return &mips_insn32_frame_unwind; return NULL; } static CORE_ADDR -mips32_frame_base_address (struct frame_info *next_frame, +mips_insn32_frame_base_address (struct frame_info *next_frame, void **this_cache) { - struct mips_frame_cache *info = mips32_frame_cache (next_frame, + struct mips_frame_cache *info = mips_insn32_frame_cache (next_frame, this_cache); return info->base; } -static const struct frame_base mips32_frame_base = +static const struct frame_base mips_insn32_frame_base = { - &mips32_frame_unwind, - mips32_frame_base_address, - mips32_frame_base_address, - mips32_frame_base_address + &mips_insn32_frame_unwind, + mips_insn32_frame_base_address, + mips_insn32_frame_base_address, + mips_insn32_frame_base_address }; static const struct frame_base * -mips32_frame_base_sniffer (struct frame_info *next_frame) +mips_insn32_frame_base_sniffer (struct frame_info *next_frame) { - if (mips32_frame_sniffer (next_frame) != NULL) - return &mips32_frame_base; + if (mips_insn32_frame_sniffer (next_frame) != NULL) + return &mips_insn32_frame_base; else return NULL; } @@ -6427,12 +6436,12 @@ mips_gdbarch_init (struct gdbarch_info i /* Unwind the frame. */ frame_unwind_append_sniffer (gdbarch, mips_stub_frame_sniffer); frame_unwind_append_sniffer (gdbarch, mips_mdebug_frame_sniffer); - frame_unwind_append_sniffer (gdbarch, mips16_frame_sniffer); - frame_unwind_append_sniffer (gdbarch, mips32_frame_sniffer); + frame_unwind_append_sniffer (gdbarch, mips_insn16_frame_sniffer); + frame_unwind_append_sniffer (gdbarch, mips_insn32_frame_sniffer); frame_base_append_sniffer (gdbarch, mips_stub_frame_base_sniffer); frame_base_append_sniffer (gdbarch, mips_mdebug_frame_base_sniffer); - frame_base_append_sniffer (gdbarch, mips16_frame_base_sniffer); - frame_base_append_sniffer (gdbarch, mips32_frame_base_sniffer); + frame_base_append_sniffer (gdbarch, mips_insn16_frame_base_sniffer); + frame_base_append_sniffer (gdbarch, mips_insn32_frame_base_sniffer); return gdbarch; } --------------090601080500090401080506--