From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25727 invoked by alias); 29 Feb 2004 23:11:46 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 25720 invoked from network); 29 Feb 2004 23:11:46 -0000 Received: from unknown (HELO localhost.redhat.com) (216.129.200.20) by sources.redhat.com with SMTP; 29 Feb 2004 23:11:46 -0000 Received: from gnu.org (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 4BE6B2B92; Sun, 29 Feb 2004 18:11:42 -0500 (EST) Message-ID: <404271AE.5000102@gnu.org> Date: Sun, 29 Feb 2004 23:11:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:1.4.1) Gecko/20040217 MIME-Version: 1.0 To: Mark Kettenis Cc: gdb-patches@sources.redhat.com Subject: Re: [PATCH] Re: [rfa/amd64] Zero fill 32-bit registers References: <403E9BC3.2030807@redhat.com> <200402281046.i1SAkhhe000441@elgar.kettenis.dyndns.org> <4040B0F8.2050803@gnu.org> <200402281734.i1SHYvol017921@elgar.kettenis.dyndns.org> <4040E96F.4010809@gnu.org> <200402282025.i1SKPdRr000430@elgar.kettenis.dyndns.org> <4040FC93.9000100@gnu.org> <200402282155.i1SLtqGg006156@elgar.kettenis.dyndns.org> In-Reply-To: <200402282155.i1SLtqGg006156@elgar.kettenis.dyndns.org> Content-Type: multipart/mixed; boundary="------------010201040702010207020308" X-SW-Source: 2004-02/txt/msg00907.txt.bz2 This is a multi-part message in MIME format. --------------010201040702010207020308 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Content-length: 850 > Date: Sat, 28 Feb 2004 15:39:47 -0500 > From: Andrew Cagney > > > Could you live with just zero-extending the 16 general-purpose > > registers and the instruction pointer? I'll implement it for you. > > It is certainly an improvement! Can you test it? > > I've tested the attached on SuSE 8.2, with -m32. No changes in the > testoutput for me, but the threaded stuff doesn't work very well on > the system (and probably no at all in on 32x64-bit). I committed it > anyway, since I can't imagine this making things worse for the > threaded stuff if it works for the non-threaded stuff. I'd appreciate > it if you could test whether this fixed the problems you were seeing. The segment registers have the same problem, is the attached ok? 6.1? With it applied I get test results that approach i386. Andrew --------------010201040702010207020308 Content-Type: text/plain; name="diffs" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="diffs" Content-length: 797 2004-02-29 Andrew Cagney * amd64-nat.c (amd64_collect_native_gregset): Zero-extend the 32-bit segment registers. Index: amd64-nat.c =================================================================== RCS file: /cvs/src/src/gdb/amd64-nat.c,v retrieving revision 1.5 diff -u -r1.5 amd64-nat.c --- amd64-nat.c 28 Feb 2004 21:55:48 -0000 1.5 +++ amd64-nat.c 29 Feb 2004 23:08:08 -0000 @@ -139,6 +139,12 @@ if (regnum == -1 || regnum == i) memset (regs + amd64_native_gregset_reg_offset (i), 0, 8); } + /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */ + for (i = I386_CS_REGNUM; i < I386_ST0_REGNUM; i++) + { + if (regnum == -1 || regnum == i) + memset (regs + amd64_native_gregset_reg_offset (i), 0, 8); + } } if (num_regs > NUM_REGS) --------------010201040702010207020308--