From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id s04THHlMTGXC0AEAWB0awg (envelope-from ) for ; Wed, 08 Nov 2023 22:05:29 -0500 Authentication-Results: simark.ca; dkim=pass (1024-bit key; unprotected) header.d=polymtl.ca header.i=@polymtl.ca header.a=rsa-sha256 header.s=default header.b=djQWxoVU; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 67F791E0C1; Wed, 8 Nov 2023 22:05:29 -0500 (EST) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 4E8CB1E00F for ; Wed, 8 Nov 2023 22:05:27 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 77E8B386074C for ; Thu, 9 Nov 2023 03:05:26 +0000 (GMT) Received: from smtp.polymtl.ca (smtp.polymtl.ca [132.207.4.11]) by sourceware.org (Postfix) with ESMTPS id E26EF385DC1D for ; Thu, 9 Nov 2023 03:05:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E26EF385DC1D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=polymtl.ca Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=polymtl.ca ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E26EF385DC1D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=132.207.4.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699499115; cv=none; b=cxFiLPz+bkWEGWhB1/l5aK97DIev84EYJHx7G4oXJw0xSTUsCXBPlOHhfFi6G5QGkzuNfWNwA5bTFjXDJuhk1rptRpljeNHMxnhR0OVFQ99s1GfI9LoV3GC+8aOnB+ae8YLOTayssI42k7clIw84a7blLdufIpyysPgHbJ5Zczk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699499115; c=relaxed/simple; bh=KPrKZ8Pz9+KEoazIA5F45lANUMIgq1mEQ0yPDKJEF+c=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:From:To; b=k3V0Ys7LzGBXhD4gcZFibCadsKCIrjkTKqKqE+CVnX5gLEiujHiO5y9HMcojvqp6cJDv/FyUNJxc9QLnJYysJqKs4RIo4tf5kaY5YBH3j3bGHeecNRFjESa/DjMlV57LK98t/9LEFwAUu96ft/Y3WeCQQDAPrhLd036NDyBrBhs= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id 3A9358Gp031199 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 8 Nov 2023 22:05:13 -0500 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca 3A9358Gp031199 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=polymtl.ca; s=default; t=1699499113; bh=4q9RNzNN7dLp9ni31Oph+GBZqgVqv6Saly3J4qI34vA=; h=Date:Subject:From:To:References:In-Reply-To:From; b=djQWxoVUvoOS+BgM1tL5WMVYlBBcTXJO6JWWS0SRZK5jBeJuOmdncA8DLKJkvPCCg niCPUdLNRZg0d9GOUNmpGc60qpHxJEr142l3oPSwKFDWbATV+kw5Swe28wWrhW5n3j 5k4T7Yd74mTQEJCKGydPOSdSll+Gjk/tgwImlw0U= Received: from [10.0.0.11] (modemcable238.237-201-24.mc.videotron.ca [24.201.237.238]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 304BA1E00F for ; Wed, 8 Nov 2023 22:05:08 -0500 (EST) Message-ID: <3ab1088f-7d0f-47ec-8300-ebfd7cd9844e@polymtl.ca> Date: Wed, 8 Nov 2023 22:05:06 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/24] Fix reading and writing pseudo registers in non-current frames Content-Language: en-US From: Simon Marchi To: gdb-patches@sourceware.org References: <20231108051222.1275306-1-simon.marchi@polymtl.ca> <2ccd7f93-0728-414e-ae0c-9a80aafed7ac@polymtl.ca> In-Reply-To: <2ccd7f93-0728-414e-ae0c-9a80aafed7ac@polymtl.ca> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Poly-FromMTA: (simark.ca [158.69.221.121]) at Thu, 9 Nov 2023 03:05:08 +0000 X-Spam-Status: No, score=-3031.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+public-inbox=simark.ca@sourceware.org On 2023-11-08 00:16, Simon Marchi wrote: > > > On 2023-11-08 00:00, Simon Marchi wrote: >> This series fixes reading/writing pseudo registers from/to non-current >> frames (that is, frames other than frame 0). Currently, we get this: >> >> (gdb) frame 0 >> #0 break_here_asm () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:38 >> 38 pop %rbx >> (gdb) p/x $rbx >> $1 = 0x2021222324252627 >> (gdb) p/x $ebx >> $2 = 0x24252627 >> (gdb) frame 1 >> #1 0x000055555555517d in caller () at /home/smarchi/src/binutils-gdb/gdb/testsuite/gdb.arch/amd64-pseudo-unwind-asm.S:58 >> 58 call callee >> (gdb) p/x $rbx >> $3 = 0x1011121314151617 >> (gdb) p/x $ebx >> $4 = 0x24252627 >> >> This is a bit surprising, we would expect the last value to be >> 0x14151617, the bottom half of the rbx value from frame 1 (the currently >> selected frame at that point). Instead, we got the bottom half of the >> rbx value from frame 0. This is because pseudo registers are always >> read/written from/to the current thread's regcache. >> >> This series fixes this (as well as writing to pseudo registers) by >> making it so pseudo registers are read/written using a frame. > > Ah, I forgot because it's been so long, but this can be considered a v3 > of this series here... > > https://inbox.sourceware.org/gdb-patches/20181024014333.14143-1-simon.marchi@polymtl.ca/ > > Simon A bit more information that I realized I left out: this series fixes the behavior for AArch64, ARM and AMD64/i386, because those are the three architectures I had tests already written for. It shouldn't be too hard to update other architectures, the slightly more difficult part is to write a test, since it involves writing assembly and CFI directives, not something most people do everyday. Simon