[RFA] Split Ipipe.exp test into seperate versions.

[Michael Snyder <msnyder@redhat.com>]

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The fr400 wasn't really being tested, because of a typo.
When I fixed the typo, the fr400 failed the test, because
of an LSI difference (it places the address of the VLIW
bundle into EPCR0, rather than the address of the insn
causing the interrupt).  So I've split the test case
into two.


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2003-09-03  Michael Snyder  <msnyder@redhat.com>

	* sim/frv/interrupts/Ipipe-fr400.cgs: New file.
	* sim/frv/interrupts/Ipipe-fr500.cgs: New file.
	* sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).

Index: sim/frv/interrupts/Ipipe-fr400.cgs
===================================================================
RCS file: sim/frv/interrupts/Ipipe-fr400.cgs
diff -N sim/frv/interrupts/Ipipe-fr400.cgs
0a1,35
> # venus testcase
> # mach: fr400 
> 
> 	.include "testutils.inc"
> 
> 	start
> 
> 	.global Ipipe
> Ipipe:
> 	; Clear the packing bit of the insn at 'pack:'. We can't
> 	; simply use '.p' because the assembler will catch the error.
> 	set_gr_mem	pack,gr10
> 	and_gr_immed	0x7fffffff,gr10
> 	set_mem_gr	gr10,pack
> 	set_gr_addr	pack,gr10
> 	flush_data_cache gr10
> 
> 	and_spr_immed	-4081,tbr		; clear tbr.tt
> 	set_gr_spr	tbr,gr7
> 	inc_gr_immed	0x070,gr7		; address of exception handler
> 	set_bctrlr_0_0  gr7
> 	set_spr_immed	128,lcr
> 	set_spr_addr	ok0,lr
> 	set_psr_et	1
> 
> bundle:	add.p		gr1,gr1,gr1
> pack:	add		gr2,gr2,gr2
> bad:	add		gr3,gr3,gr3
> 	fail
> ok0:
> 	test_spr_immed	1,esfr1
> 	test_spr_bits	0x3f,0,0xb,esr0
> 	test_spr_addr	bundle,epcr0
> 
> 	pass
Index: sim/frv/interrupts/Ipipe-fr500.cgs
===================================================================
RCS file: sim/frv/interrupts/Ipipe-fr500.cgs
diff -N sim/frv/interrupts/Ipipe-fr500.cgs
0a1,35
> # venus testcase
> # mach: fr500 
> 
> 	.include "testutils.inc"
> 
> 	start
> 
> 	.global Ipipe
> Ipipe:
> 	; Clear the packing bit of the insn at 'pack:'. We can't
> 	; simply use '.p' because the assembler will catch the error.
> 	set_gr_mem	pack,gr10
> 	and_gr_immed	0x7fffffff,gr10
> 	set_mem_gr	gr10,pack
> 	set_gr_addr	pack,gr10
> 	flush_data_cache gr10
> 
> 	and_spr_immed	-4081,tbr		; clear tbr.tt
> 	set_gr_spr	tbr,gr7
> 	inc_gr_immed	0x070,gr7		; address of exception handler
> 	set_bctrlr_0_0  gr7
> 	set_spr_immed	128,lcr
> 	set_spr_addr	ok0,lr
> 	set_psr_et	1
> 
> 	add.p		gr1,gr1,gr1
> pack:	add		gr2,gr2,gr2
> bad:	add		gr3,gr3,gr3
> 	fail
> ok0:
> 	test_spr_immed	1,esfr1
> 	test_spr_bits	0x3f,0,0xb,esr0
> 	test_spr_addr	bad,epcr0
> 
> 	pass