Re: [WIP/RFC] MIPS registers overhaul

Andrew Cagney
2003-05-23T18:39:56Z

>> Er, it's the same deal as for SPARC. If GDB is built against the 64 bit
>> debug interface, it can debug both 32 and 64 bit applications. This is
>> the debuggers view, not the program being run's view.
>
>
> But the point is that the debugger's view of a 32-bit application on
> MIPS is of a 32-bit ISA. That's all that's available. You get 32-bit
> registers from the kernel.

That isn't true. CF the embedded case. The ISA can be 64 bits, but the
ABI 32 bits. This argument is becomming circular.

GDB has to make a choice. Either hack the tdep code so that it tries to
get the user, register, and target ABIs to all line up, or select an
underlying canonical ISA and expect targets to map their register values
onto that. Selecting a definitive 64 bit ISA means that the tdep code
works in all cases - the target is made responsibile for resolving self
inflicted esoteric edge cases.

Note here that the self inflicting esoteric target is remote.c, it is
still tied to the register cache at the hip :-(

Andrew