From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32087 invoked by alias); 21 May 2003 19:39:00 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 31763 invoked from network); 21 May 2003 19:38:55 -0000 Received: from unknown (HELO localhost.redhat.com) (207.219.125.131) by sources.redhat.com with SMTP; 21 May 2003 19:38:55 -0000 Received: from redhat.com (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 5C03F2B2F; Wed, 21 May 2003 15:38:43 -0400 (EDT) Message-ID: <3ECBD5C3.3000706@redhat.com> Date: Wed, 21 May 2003 19:39:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:1.0.2) Gecko/20030223 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Kevin Buettner Cc: gdb-patches@sources.redhat.com Subject: Re: [RFA] MIPS: Introduce struct mips_regnums and accessors References: <1030515235130.ZM7492@localhost.localdomain> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2003-05/txt/msg00396.txt.bz2 Kevin, I think the struct contains too many redudnant fields. Instead it can be be trimmed back to identify just the boundaries between the different register groups vis: - gp0 (gp31?) - fp0 - hi, lo - pc - various status registers - others? As for assigning meaning to specific registers (v0, a0, ...) within a group, offsets can be used vis: v0_regnum (regnums) === regnums->gp0 + offset; With regard to having only 16 o32 FP registers, is that right? Does it just confuse things? Doesn't the o32 debug info assume a bank of 32 contigious 32 bit registers? A location expression for a double in ``f0'' would be f0:f1 for instance. Andrew > +/* MIPS register numbers. */ > +struct mips_regnums > + { > + int zero_regnum; /* The zero register; read-only, always 0. */ > + int v0_regnum; /* Function return value. */ > + int a0_regnum; /* First GPR used for passing arguments. */ > + int t9_regnum; /* Contains address of callee in PIC code. */ > + int sp_regnum; /* Stack pointer. */ > + int ra_regnum; /* Return address. */ > + int ps_regnum; /* Processor status. */ > + int hi_regnum; /* High portion of internal multiply/divide > + register. */ > + int lo_regnum; /* Low portion of internal multiply/divide > + register. */ > + int badvaddr_regnum; /* Address associated with > + addressing exception. */ > + int cause_regnum; /* Describes last exception. */ > + int pc_regnum; /* Program counter. */ > + int fcrcs_regnum; /* FP control/status. */ > + int fcrir_regnum; /* FP implementation/revision. */ > + int fp0_regnum; /* First floating point register. */ > + int fplast_regnum; /* Last floating point register. */ > + int fpa0_regnum; /* First floating point register used for > + passing floating point arguments. */ > + int first_embed_regnum; /* First CP0 register for embedded use. */ > + int last_embed_regnum; /* Last CP0 register for embedded use. */ > + int prid_regnum; /* Processor ID. */ > + > + int last_arg_regnum; /* Last general purpose register used for > + passing arguments. (a0_regnum is the > + first.) */ > + int last_fp_arg_regnum; /* Last floating point register used for > + passing floating point arguments. */ > + };