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Message-ID: <3D89E9EE.9020902@ges.redhat.com>
Date: Thu, 19 Sep 2002 08:15:00 -0000
From: Andrew Cagney <ac131313@ges.redhat.com>
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To: Daniel Jacobowitz <drow@mvista.com>
Cc: Nick Clifton <nickc@redhat.com>,
	Hans-Peter Nilsson <hp@bitrange.com>, gdb-patches@sources.redhat.com
Subject: Re: v850 sim noncompile (was: Re: Add v850 linker relaxation)
References: <Pine.BSF.4.44.0209181811090.78869-100000@dair.pair.com> <m37khizabx.fsf@north-pole.nickc.cambridge.redhat.com> <3D89E392.1080100@ges.redhat.com> <20020919145121.GA19937@nevyn.them.org>
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> 
> Andrew, Nick is perfectly correct:
> 2002-08-28  Catherine Moore  <clm@redhat.com>
> 
>         * elf32-v850.c (v850_elf_reloc_map):  Add new relocs.
>         (v850-elf-reloc): Don't resolve pc relative relocs.
>         (v850_elf_ignore_reloc): New routine.
>         (v850_elf_final_link_relocate): Handle new relocs.
>         (v850_elf_relax_delete_bytes ): New routine.
>         (v850_elf_relax_section): New routine.
>         (bfd_elf32_bfd_relax_section): Define.
>         (HOWTO): New entries for new relocs.
>         * reloc.c (BFD_RELOC_V850_LONGCALL): New reloc.
>         (BFD_RELOC_V850_LONGJUMP): New reloc.
>         (BFD_RELOC_V850_ALIGN): New reloc.
>         * archures.c: Remove redundant v850ea architecture.
>         * cpu-v850.c: Remove redundant v850ea support.
>         * libbfd.h: Regenerate.
>         * bfd-in2.h: Regenerated.

The patch doesn't so much remove left over redundancy as delete an 
entire ISA:

-
- // DIVHN
- rrrrr,111111,RRRRR + wwwww,01010,iiii,00:XI:::divhn
- *v850ea
- "divhn <imm5>, r<reg1>, r<reg2>, r<reg3>"
- {
-   signed32 quotient;
-   signed32 remainder;
-   signed32 divide_by;
-   signed32 divide_this;
-   boolean overflow = false;
-   SAVE_2;
-
-   trace_input ("divhn", OP_IMM_REG_REG_REG, 0);
-
-   divide_by   = EXTEND16 (State.regs[ reg1 ]);
-   divide_this = State.regs[ reg2 ];
-
-   divn (imm5, divide_by, divide_this, & quotient, & remainder, & 
overflow);
-
-   State.regs[ reg2 ] = quotient;
-   State.regs[ reg3 ] = remainder;
-
-   /* Set condition codes.  */
-   PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
-   if (overflow)      PSW |= PSW_OV;
-   if (quotient == 0) PSW |= PSW_Z;
-   if (quotient <  0) PSW |= PSW_S;
-
-   trace_output (OP_IMM_REG_REG_REG);
- }
-

Andrew